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-rw-r--r--package/boot/uboot-sunxi/Makefile67
-rw-r--r--package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch375
-rw-r--r--package/boot/uboot-sunxi/patches/062-A20-improve-gmac-upload.patch2
-rw-r--r--package/boot/uboot-sunxi/patches/063-fix-lime2-revK-add-micrel-PHY.patch44
-rw-r--r--package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch2
-rw-r--r--package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch6
-rw-r--r--package/boot/uboot-sunxi/patches/100-sun6i-alternate-on-UART2.patch16
-rw-r--r--package/boot/uboot-sunxi/patches/101-sun6i-support-console-on-UART2.patch30
-rw-r--r--package/boot/uboot-sunxi/patches/102-sunxi-make_CONS_INDEX-configurable.patch23
-rw-r--r--package/boot/uboot-sunxi/patches/200-mkimage-check-environment-for-dtc-binary-location.patch2
-rw-r--r--package/boot/uboot-sunxi/patches/210-sunxi-deactivate-binman.patch37
-rw-r--r--package/boot/uboot-sunxi/patches/230-disable-axp209-on-a13-olinuxino.diff19
-rw-r--r--package/boot/uboot-sunxi/patches/250-sun8i-h3-zeropi-add-device-tree.patch81
-rw-r--r--package/boot/uboot-sunxi/patches/251-sun8i-h3-zeropi-add-defconfig.patch24
-rw-r--r--package/boot/uboot-sunxi/patches/252-sunxi-h3-add-support-for-nanopi-r1.patch162
-rw-r--r--package/boot/uboot-sunxi/patches/254-sunxi-h2-add-bpi-p2-zero.patch307
-rw-r--r--package/boot/uboot-sunxi/patches/260-add-missing-type-u64.patch10
-rw-r--r--package/boot/uboot-sunxi/uEnv-default.txt8
-rw-r--r--package/boot/uboot-sunxi/uEnv-h616.txt7
19 files changed, 378 insertions, 844 deletions
diff --git a/package/boot/uboot-sunxi/Makefile b/package/boot/uboot-sunxi/Makefile
index 9dce3e448a1..7f50992e695 100644
--- a/package/boot/uboot-sunxi/Makefile
+++ b/package/boot/uboot-sunxi/Makefile
@@ -9,12 +9,14 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
-PKG_VERSION:=2020.04
+PKG_VERSION:=2023.04
-PKG_HASH:=fe732aaf037d9cc3c0909bad8362af366ae964bbdac6913a34081ff4ad565372
+PKG_HASH:=e31cac91545ff41b71cec5d8c22afd695645cd6e2a442ccdacacd60534069341
PKG_MAINTAINER:=Zoltan HERPAI <wigyori@uid0.hu>
+UBOOT_USE_INTREE_DTC:=1
+
include $(INCLUDE_DIR)/u-boot.mk
include $(INCLUDE_DIR)/package.mk
@@ -29,7 +31,7 @@ define U-Boot/a64-olinuxino
BUILD_SUBTARGET:=cortexa53
NAME:=Olimex A64-OLinuXino
BUILD_DEVICES:=olimex_a64-olinuxino
- DEPENDS:=+PACKAGE_u-boot-olimex_a64-olinuxino:arm-trusted-firmware-sunxi-a64
+ DEPENDS:=+PACKAGE_u-boot-olimex_a64-olinuxino:trusted-firmware-a-sunxi-a64
UENV:=a64
ATF:=a64
endef
@@ -38,7 +40,7 @@ define U-Boot/a64-olinuxino-emmc
BUILD_SUBTARGET:=cortexa53
NAME:=Olimex A64-OLinuXino eMMC
BUILD_DEVICES:=olimex_a64-olinuxino-emmc
- DEPENDS:=+PACKAGE_u-boot-olimex_a64-olinuxino-emmc:arm-trusted-firmware-sunxi-a64
+ DEPENDS:=+PACKAGE_u-boot-olimex_a64-olinuxino-emmc:trusted-firmware-a-sunxi-a64
UENV:=a64
ATF:=a64
endef
@@ -116,8 +118,8 @@ endef
define U-Boot/Marsboard_A10
BUILD_SUBTARGET:=cortexa8
- NAME:=Marsboard
- BUILD_DEVICES:=marsboard_a10-marsboard
+ NAME:=HAOYU Marsboard A10
+ BUILD_DEVICES:=haoyu_a10-marsboard
endef
define U-Boot/Mele_M9
@@ -207,7 +209,7 @@ endef
define U-Boot/orangepi_one_plus
BUILD_SUBTARGET:=cortexa53
NAME:=Orange Pi One Plus (H6)
- DEPENDS:=+PACKAGE_u-boot-orangepi_one_plus:arm-trusted-firmware-sunxi-h6
+ DEPENDS:=+PACKAGE_u-boot-orangepi_one_plus:trusted-firmware-a-sunxi-h6
BUILD_DEVICES:=xunlong_orangepi-one-plus
UENV:=h6
ATF:=h6
@@ -247,7 +249,7 @@ define U-Boot/libretech_all_h3_cc_h5
BUILD_SUBTARGET:=cortexa53
NAME:=Libre Computer ALL-H3-CC H5
BUILD_DEVICES:=libretech_all-h3-cc-h5
- DEPENDS:=+PACKAGE_u-boot-libretech_all_h3_cc_h5:arm-trusted-firmware-sunxi-a64
+ DEPENDS:=+PACKAGE_u-boot-libretech_all_h3_cc_h5:trusted-firmware-a-sunxi-a64
UENV:=a64
ATF:=a64
endef
@@ -256,7 +258,7 @@ define U-Boot/nanopi_neo_plus2
BUILD_SUBTARGET:=cortexa53
NAME:=NanoPi NEO Plus2 (H5)
BUILD_DEVICES:=friendlyarm_nanopi-neo-plus2
- DEPENDS:=+PACKAGE_u-boot-nanopi_neo_plus2:arm-trusted-firmware-sunxi-a64
+ DEPENDS:=+PACKAGE_u-boot-nanopi_neo_plus2:trusted-firmware-a-sunxi-a64
UENV:=a64
ATF:=a64
endef
@@ -265,7 +267,16 @@ define U-Boot/nanopi_neo2
BUILD_SUBTARGET:=cortexa53
NAME:=NanoPi NEO2 (H5)
BUILD_DEVICES:=friendlyarm_nanopi-neo2
- DEPENDS:=+PACKAGE_u-boot-nanopi_neo2:arm-trusted-firmware-sunxi-a64
+ DEPENDS:=+PACKAGE_u-boot-nanopi_neo2:trusted-firmware-a-sunxi-a64
+ UENV:=a64
+ ATF:=a64
+endef
+
+define U-Boot/nanopi_r1s_h5
+ BUILD_SUBTARGET:=cortexa53
+ NAME:=NanoPi R1S (H5)
+ BUILD_DEVICES:=friendlyarm_nanopi-r1s-h5
+ DEPENDS:=+PACKAGE_u-boot-nanopi_r1s_h5:trusted-firmware-a-sunxi-a64
UENV:=a64
ATF:=a64
endef
@@ -274,7 +285,7 @@ define U-Boot/pine64_plus
BUILD_SUBTARGET:=cortexa53
NAME:=Pine64 Plus A64
BUILD_DEVICES:=pine64_pine64-plus
- DEPENDS:=+PACKAGE_u-boot-pine64_plus:arm-trusted-firmware-sunxi-a64
+ DEPENDS:=+PACKAGE_u-boot-pine64_plus:trusted-firmware-a-sunxi-a64
UENV:=a64
ATF:=a64
endef
@@ -285,11 +296,17 @@ define U-Boot/bananapi_m2_plus_h3
BUILD_DEVICES:=sinovoip_bananapi-m2-plus
endef
+define U-Boot/Sinovoip_BPI_M3
+ BUILD_SUBTARGET:=cortexa7
+ NAME:=Bananapi M3
+ BUILD_DEVICES:=sinovoip_bananapi-m3
+endef
+
define U-Boot/sopine_baseboard
BUILD_SUBTARGET:=cortexa53
NAME:=Sopine Baseboard
BUILD_DEVICES:=pine64_sopine-baseboard
- DEPENDS:=+PACKAGE_u-boot-sopine_baseboard:arm-trusted-firmware-sunxi-a64
+ DEPENDS:=+PACKAGE_u-boot-sopine_baseboard:trusted-firmware-a-sunxi-a64
UENV:=a64
ATF:=a64
endef
@@ -299,7 +316,7 @@ define U-Boot/orangepi_zero_plus
BUILD_SUBTARGET:=cortexa53
NAME:=Xunlong Orange Pi Zero Plus
BUILD_DEVICES:=xunlong_orangepi-zero-plus
- DEPENDS:=+PACKAGE_u-boot-orangepi_zero_plus:arm-trusted-firmware-sunxi-a64
+ DEPENDS:=+PACKAGE_u-boot-orangepi_zero_plus:trusted-firmware-a-sunxi-a64
UENV:=a64
ATF:=a64
endef
@@ -308,11 +325,20 @@ define U-Boot/orangepi_pc2
BUILD_SUBTARGET:=cortexa53
NAME:=Xunlong Orange Pi PC2
BUILD_DEVICES:=xunlong_orangepi-pc2
- DEPENDS:=+PACKAGE_u-boot-orangepi_pc2:arm-trusted-firmware-sunxi-a64
+ DEPENDS:=+PACKAGE_u-boot-orangepi_pc2:trusted-firmware-a-sunxi-a64
UENV:=a64
ATF:=a64
endef
+define U-Boot/orangepi_zero2
+ BUILD_SUBTARGET:=cortexa53
+ NAME:=Xunlong Orange Pi Zero2
+ BUILD_DEVICES:=xunlong_orangepi-zero2
+ DEPENDS:=+PACKAGE_u-boot-orangepi_zero2:trusted-firmware-a-sunxi-h616
+ UENV:=h616
+ ATF:=h616
+endef
+
define U-Boot/Bananapi_M2_Ultra
BUILD_SUBTARGET:=cortexa7
NAME:=Bananapi M2 Ultra
@@ -325,6 +351,13 @@ define U-Boot/bananapi_m2_berry
BUILD_DEVICES:=sinovoip_bananapi-m2-berry
endef
+define U-Boot/bananapi_p2_zero
+ BUILD_SUBTARGET:=cortexa7
+ NAME:=Bananapi P2 Zero
+ BUILD_DEVICES:=sinovoip_bananapi-p2-zero
+endef
+
+
UBOOT_TARGETS := \
a64-olinuxino \
a64-olinuxino-emmc \
@@ -337,6 +370,7 @@ UBOOT_TARGETS := \
bananapi_m2_plus_h3 \
Bananapi \
bananapi_m2_berry \
+ bananapi_p2_zero \
Bananapi_M2_Ultra \
Bananapro \
Cubieboard \
@@ -357,6 +391,7 @@ UBOOT_TARGETS := \
nanopi_neo_plus2 \
nanopi_neo2 \
nanopi_r1 \
+ nanopi_r1s_h5 \
orangepi_zero \
orangepi_r1 \
orangepi_one \
@@ -366,8 +401,10 @@ UBOOT_TARGETS := \
orangepi_plus \
orangepi_2 \
orangepi_pc2 \
+ orangepi_zero2 \
pangolin \
pine64_plus \
+ Sinovoip_BPI_M3 \
sopine_baseboard \
orangepi_zero_plus \
libretech_all_h3_cc_h5
@@ -375,7 +412,7 @@ UBOOT_TARGETS := \
UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes
UBOOT_MAKE_FLAGS += \
- BL31=$(STAGING_DIR_IMAGE)/bl31_sun50i_$(ATF).bin
+ BL31=$(STAGING_DIR_IMAGE)/bl31_sunxi-$(ATF).bin SCP=/dev/null
define Build/InstallDev
$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
diff --git a/package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch b/package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch
deleted file mode 100644
index 29969a71abe..00000000000
--- a/package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch
+++ /dev/null
@@ -1,375 +0,0 @@
---- a/arch/arm/dts/Makefile
-+++ b/arch/arm/dts/Makefile
-@@ -455,6 +455,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \
- sun6i-a31-m9.dtb \
- sun6i-a31-mele-a1000g-quad.dtb \
- sun6i-a31-mixtile-loftq.dtb \
-+ sun6i-a31-pangolin.dtb \
- sun6i-a31s-colorfly-e708-q1.dtb \
- sun6i-a31s-cs908.dtb \
- sun6i-a31s-inet-q972.dtb \
---- a/arch/arm/dts/sun6i-a31.dtsi
-+++ b/arch/arm/dts/sun6i-a31.dtsi
-@@ -641,6 +641,11 @@
- function = "lcd0";
- };
-
-+ i2c3_pins_a: i2c3@0 {
-+ allwinner,pins = "PB5", "PB6";
-+ allwinner,function = "i2c3";
-+ };
-+
- mmc0_pins_a: mmc0@0 {
- pins = "PF0", "PF1", "PF2",
- "PF3", "PF4", "PF5";
---- /dev/null
-+++ b/arch/arm/dts/sun6i-a31-pangolin.dts
-@@ -0,0 +1,292 @@
-+/*
-+ * Copyright 2015, Theobroma Systems Design und Consulting GmbH
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ * a) This file is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ * b) Permission is hereby granted, free of charge, to any person
-+ * obtaining a copy of this software and associated documentation
-+ * files (the "Software"), to deal in the Software without
-+ * restriction, including without limitation the rights to use,
-+ * copy, modify, merge, publish, distribute, sublicense, and/or
-+ * sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following
-+ * conditions:
-+ *
-+ * The above copyright notice and this permission notice shall be
-+ * included in all copies or substantial portions of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ * OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+/dts-v1/;
-+#include "sun6i-a31.dtsi"
-+#include "sunxi-common-regulators.dtsi"
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/pinctrl/sun4i-a10.h>
-+
-+/ {
-+ model = "Theobroma Systems A31 Pangolin";
-+ compatible = "tsd,a31-pangolin", "allwinner,sun6i-a31";
-+
-+ aliases {
-+ serial0 = &uart0;
-+ serial2 = &uart2;
-+ spi0 = &spi0;
-+ spi1 = &spi1;
-+ spi2 = &spi2;
-+ spi3 = &spi3;
-+ };
-+
-+ chosen {
-+ stdout-path = "serial2:115200n8";
-+ };
-+};
-+
-+&ehci0 {
-+ status = "okay";
-+};
-+
-+&ohci0 {
-+ status = "okay";
-+};
-+
-+&ehci1 {
-+ status = "okay";
-+};
-+
-+&ohci1 {
-+ status = "okay";
-+};
-+
-+&ohci2 {
-+ status = "okay";
-+};
-+
-+&gmac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&gmac_pins_rgmii_a>;
-+ phy = <&phy1>;
-+ phy-mode = "rgmii";
-+ snps,reset-gpio = <&pio 0 7 GPIO_ACTIVE_LOW>;
-+ snps,reset-active-low;
-+ snps,reset-delays-us = <0 10000 30000>;
-+ status = "okay";
-+
-+ phy1: ethernet-phy@4 {
-+ reg = <4>;
-+ };
-+};
-+
-+&i2c0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&i2c0_pins_a>;
-+ status = "okay";
-+};
-+
-+&i2c1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&i2c1_pins_a>;
-+ status = "okay";
-+};
-+
-+&i2c2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&i2c2_pins_a>;
-+ status = "okay";
-+};
-+
-+&i2c3 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&i2c3_pins_a>;
-+ status = "okay";
-+
-+ rtc_twi: rtc@6f {
-+ compatible = "isil,isl1208";
-+ reg = <0x6f>;
-+ };
-+ fan: fan@18 {
-+ compatible = "ti,amc6821";
-+ reg = <0x18>;
-+ cooling-min-state = <0>;
-+ cooling-max-state = <9>;
-+ #cooling-cells = <2>;
-+ };
-+};
-+
-+&spi0 {
-+ status = "okay";
-+
-+ flash: flash@0 {
-+ compatible = "spansion,m25p40";
-+ spi-max-frequency = <16000000>;
-+ spi-cpol;
-+ spi-cpha;
-+ };
-+};
-+
-+&spi1 {
-+ status = "okay";
-+};
-+
-+&ir {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&ir_pins_a>;
-+ status = "okay";
-+};
-+
-+&mmc0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_pangolin>;
-+ vmmc-supply = <&reg_vcc3v0>;
-+ bus-width = <4>;
-+ cd-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */
-+ status = "okay";
-+};
-+
-+&mmc0_pins_a {
-+ /* external pull-ups missing for some pins */
-+ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
-+};
-+
-+&mmc2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc2_pins_a>;
-+ vmmc-supply = <&reg_vcc3v0>;
-+ bus-width = <8>;
-+ non-removable;
-+ status = "okay";
-+};
-+
-+&pio {
-+ mmc0_cd_pin_pangolin: mmc0_cd_pin@0 {
-+ allwinner,pins = "PC19";
-+ allwinner,function = "gpio_in";
-+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
-+ };
-+
-+ leds_pins_pangolin: led_pins@0 {
-+ allwinner,pins = "PH7", "PC16";
-+ allwinner,function = "gpio_out";
-+ allwinner,drive = <SUN4I_PINCTRL_20_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+
-+ mmc2_pins_a: mmc2@0 {
-+ allwinner,pins = "PC6","PC7","PC8","PC9","PC10","PC11",
-+ "PC12","PC13","PC14","PC15";
-+ allwinner,function = "mmc2";
-+ allwinner,drive = <SUN4I_PINCTRL_30_MA>;
-+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-+ };
-+};
-+
-+&p2wi {
-+ status = "okay";
-+
-+ axp221: pmic@68 {
-+ compatible = "x-powers,axp221";
-+ reg = <0x68>;
-+ interrupt-parent = <&nmi_intc>;
-+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-+ interrupt-controller;
-+ #interrupt-cells = <1>;
-+ dcdc1-supply = <&vcc_3v0>;
-+ dcdc5-supply = <&vcc_dram>;
-+
-+ regulators {
-+ x-powers,dcdc-freq = <3000>;
-+
-+ vcc_3v0: dcdc1 {
-+ regulator-always-on;
-+ regulator-min-microvolt = <3000000>;
-+ regulator-max-microvolt = <3000000>;
-+ regulator-name = "vcc-3v0";
-+ };
-+
-+ vdd_cpu: dcdc2 {
-+ regulator-always-on;
-+ regulator-min-microvolt = <700000>;
-+ regulator-max-microvolt = <1320000>;
-+ regulator-name = "vdd-cpu";
-+ };
-+
-+ vdd_gpu: dcdc3 {
-+ regulator-always-on;
-+ regulator-min-microvolt = <700000>;
-+ regulator-max-microvolt = <1320000>;
-+ regulator-name = "vdd-gpu";
-+ };
-+
-+ vdd_sys_dll: dcdc4 {
-+ regulator-always-on;
-+ regulator-min-microvolt = <1100000>;
-+ regulator-max-microvolt = <1100000>;
-+ regulator-name = "vdd-sys-dll";
-+ };
-+
-+ vcc_dram: dcdc5 {
-+ regulator-always-on;
-+ regulator-min-microvolt = <1500000>;
-+ regulator-max-microvolt = <1500000>;
-+ regulator-name = "vcc-dram";
-+ };
-+
-+ vcc_wifi: aldo1 {
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-name = "vcc_wifi";
-+ };
-+
-+ avcc: aldo3 {
-+ regulator-always-on;
-+ regulator-min-microvolt = <3000000>;
-+ regulator-max-microvolt = <3000000>;
-+ regulator-name = "avcc";
-+ };
-+ };
-+ };
-+};
-+
-+&uart0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&uart0_pins_a>;
-+ status = "okay";
-+};
-+
-+&usb1_vbus_pin_a {
-+ allwinner,pins = "PD23";
-+};
-+
-+&reg_usb1_vbus {
-+ gpio = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD 23 */
-+ status = "okay";
-+};
-+
-+&usbphy {
-+ status = "okay";
-+ usb1_vbus-supply = <&reg_usb1_vbus>;
-+};
---- /dev/null
-+++ b/configs/pangolin_defconfig
-@@ -0,0 +1,36 @@
-+CONFIG_SUNXI_PANGOLIN=y
-+CONFIG_SPL=y
-+CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI,SUNXI_GMAC,RGMII"
-+CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-pangolin"
-+CONFIG_VIDEO_VGA_VIA_LCD=y
-+CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25"
-+CONFIG_ARM=y
-+CONFIG_ARCH_SUNXI=y
-+CONFIG_MACH_SUN6I=y
-+CONFIG_DRAM_CHANNELS=1
-+CONFIG_DRAM_CLK=360
-+CONFIG_DRAM_ZQ=70
-+CONFIG_AXP_DCDC1_VOLT=3300
-+CONFIG_AXP_ALDO1_VOLT=0
-+CONFIG_AXP_ALDO2_VOLT=1800
-+CONFIG_AXP_ALDO3_VOLT=3000
-+CONFIG_AXP_DLDO4_VOLT=3300
-+CONFIG_AXP_ELDO1_VOLT=1200
-+CONFIG_AXP_ELDO2_VOLT=2500
-+CONFIG_AXP_ELDO3_VOLT=3300
-+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
-+CONFIG_CONS_INDEX=3
-+# Vbus gpio for usb1
-+CONFIG_USB1_VBUS_PIN=""
-+# No Vbus gpio for usb2
-+CONFIG_USB2_VBUS_PIN=""
-+CONFIG_USB=y
-+CONFIG_DM_USB=y
-+CONFIG_USB_EHCI=y
-+CONFIG_USB_KEYBOARD=y
-+CONFIG_DM_ETH=y
-+CONFIG_CMD_IMLS=n
-+CONFIG_ETH_DESIGNWARE=y
-+CONFIG_DM_SPI=y
-+CONFIG_DM_SPI_FLASH=y
-+CONFIG_SUNXI_SPI=y
---- a/arch/arm/mach-sunxi/Kconfig
-+++ b/arch/arm/mach-sunxi/Kconfig
-@@ -896,6 +896,14 @@ config VIDEO_LCD_PANEL_I2C_SCL
- Set the SCL pin for the LCD i2c interface. This takes a string in the
- format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
-
-+choice
-+ prompt "Sunxi Board Variant"
-+ optional
-+
-+config SUNXI_PANGOLIN
-+ bool "Theobroma A31 uQ7 Board"
-+
-+endchoice
-
- # Note only one of these may be selected at a time! But hidden choices are
- # not supported by Kconfig
diff --git a/package/boot/uboot-sunxi/patches/062-A20-improve-gmac-upload.patch b/package/boot/uboot-sunxi/patches/062-A20-improve-gmac-upload.patch
index b805bbd1693..13a703f307d 100644
--- a/package/boot/uboot-sunxi/patches/062-A20-improve-gmac-upload.patch
+++ b/package/boot/uboot-sunxi/patches/062-A20-improve-gmac-upload.patch
@@ -2,7 +2,7 @@
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
-@@ -22,6 +22,7 @@ CONFIG_ETH_DESIGNWARE=y
+@@ -26,6 +26,7 @@ CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_MII=y
CONFIG_SUN7I_GMAC=y
diff --git a/package/boot/uboot-sunxi/patches/063-fix-lime2-revK-add-micrel-PHY.patch b/package/boot/uboot-sunxi/patches/063-fix-lime2-revK-add-micrel-PHY.patch
deleted file mode 100644
index e1ed58ee0d2..00000000000
--- a/package/boot/uboot-sunxi/patches/063-fix-lime2-revK-add-micrel-PHY.patch
+++ /dev/null
@@ -1,44 +0,0 @@
---- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig
-+++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
-@@ -8,6 +8,8 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2
- CONFIG_USB0_VBUS_PIN="PC17"
- CONFIG_USB0_VBUS_DET="PH5"
- CONFIG_I2C1_ENABLE=y
-+CONFIG_PHY_MICREL=y
-+CONFIG_PHY_MICREL_KSZ90X1=y
- CONFIG_SATAPWR="PC3"
- CONFIG_SPL_SPI_SUNXI=y
- CONFIG_AHCI=y
---- a/configs/A20-OLinuXino-Lime2_defconfig
-+++ b/configs/A20-OLinuXino-Lime2_defconfig
-@@ -7,6 +7,8 @@ CONFIG_MMC0_CD_PIN="PH1"
- CONFIG_USB0_VBUS_PIN="PC17"
- CONFIG_USB0_VBUS_DET="PH5"
- CONFIG_I2C1_ENABLE=y
-+CONFIG_PHY_MICREL=y
-+CONFIG_PHY_MICREL_KSZ90X1=y
- CONFIG_SATAPWR="PC3"
- CONFIG_AHCI=y
- # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
---- a/drivers/net/phy/micrel_ksz90x1.c
-+++ b/drivers/net/phy/micrel_ksz90x1.c
-@@ -14,6 +14,8 @@
- #include <errno.h>
- #include <micrel.h>
- #include <phy.h>
-+#include <asm/io.h>
-+#include <asm/arch/clock.h>
-
- /*
- * KSZ9021 - KSZ9031 common
-@@ -344,6 +346,10 @@ static int ksz9031_phy_extwrite(struct p
- static int ksz9031_config(struct phy_device *phydev)
- {
- int ret;
-+ struct sunxi_ccm_reg *const ccm =
-+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-+
-+ setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_DELAY(4));
-
- ret = ksz9031_of_config(phydev);
- if (ret)
diff --git a/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch b/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch
index f2a2b5e48fc..8605436b1ae 100644
--- a/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch
+++ b/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch
@@ -14,7 +14,7 @@ More specifically, the following settings are now used:
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
-@@ -112,11 +112,12 @@ void clock_set_pll1(unsigned int clk)
+@@ -131,11 +131,12 @@ void clock_set_pll1(unsigned int clk)
struct sunxi_ccm_reg * const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
const int p = 0;
diff --git a/package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch b/package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch
index b62209e1dcb..b5fa2a14157 100644
--- a/package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch
+++ b/package/boot/uboot-sunxi/patches/093-sun6i-fix-PLL-LDO-voltselect.patch
@@ -18,7 +18,7 @@ required setting for the PLL LDO is 1.37v as per the A31 manual.
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
-@@ -25,13 +25,26 @@ void clock_init_safe(void)
+@@ -28,13 +28,26 @@ void clock_init_safe(void)
struct sunxi_prcm_reg * const prcm =
(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
@@ -47,8 +47,8 @@ required setting for the PLL LDO is 1.37v as per the A31 manual.
#endif
#if defined(CONFIG_MACH_SUN8I_R40) || defined(CONFIG_MACH_SUN50I)
---- a/arch/arm/include/asm/arch-sunxi/prcm.h
-+++ b/arch/arm/include/asm/arch-sunxi/prcm.h
+--- a/arch/arm/include/asm/arch-sunxi/prcm_sun6i.h
++++ b/arch/arm/include/asm/arch-sunxi/prcm_sun6i.h
@@ -110,13 +110,13 @@
#define PRCM_PLL_CTRL_LDO_OUT_MASK \
__PRCM_PLL_CTRL_LDO_OUT(0x7)
diff --git a/package/boot/uboot-sunxi/patches/100-sun6i-alternate-on-UART2.patch b/package/boot/uboot-sunxi/patches/100-sun6i-alternate-on-UART2.patch
deleted file mode 100644
index a7afa513041..00000000000
--- a/package/boot/uboot-sunxi/patches/100-sun6i-alternate-on-UART2.patch
+++ /dev/null
@@ -1,16 +0,0 @@
-From d7311b6e7cdd1fc0e92665188e650934718cb2b1 Mon Sep 17 00:00:00 2001
-From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
-Date: Tue, 16 Jun 2015 10:52:01 +0200
-Subject: sun6i: define alternate-function for UART2 on GPG
-
-
---- a/arch/arm/include/asm/arch-sunxi/gpio.h
-+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
-@@ -190,6 +190,7 @@ enum sunxi_gpio_number {
- #define SUN6I_GPG_SDC1 2
- #define SUN8I_GPG_SDC1 2
- #define SUN6I_GPG_TWI3 2
-+#define SUN6I_GPG_UART2 2
- #define SUN5I_GPG_UART1 4
-
- #define SUN6I_GPH_PWM 2
diff --git a/package/boot/uboot-sunxi/patches/101-sun6i-support-console-on-UART2.patch b/package/boot/uboot-sunxi/patches/101-sun6i-support-console-on-UART2.patch
deleted file mode 100644
index 823c1568090..00000000000
--- a/package/boot/uboot-sunxi/patches/101-sun6i-support-console-on-UART2.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From c058dfb69136d62f88ae8b121104bdb7ce2df03f Mon Sep 17 00:00:00 2001
-From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
-Date: Tue, 16 Jun 2015 10:53:11 +0200
-Subject: ARM: sun6i: Support console on UART2 (GPG6/GPG7)
-
-
---- a/arch/arm/mach-sunxi/board.c
-+++ b/arch/arm/mach-sunxi/board.c
-@@ -129,6 +129,10 @@ static int gpio_init(void)
- sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
- sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
- sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
-+#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN6I)
-+ sunxi_gpio_set_cfgpin(SUNXI_GPG(6), SUN6I_GPG_UART2);
-+ sunxi_gpio_set_cfgpin(SUNXI_GPG(7), SUN6I_GPG_UART2);
-+ sunxi_gpio_set_pull(SUNXI_GPG(7), SUNXI_GPIO_PULL_UP);
- #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
- sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
- sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);
---- a/include/configs/sunxi-common.h
-+++ b/include/configs/sunxi-common.h
-@@ -244,6 +244,8 @@ extern int soft_i2c_gpio_scl;
- #endif
- #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
- #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
-+#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN6I)
-+#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
- #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
- #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
- #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
diff --git a/package/boot/uboot-sunxi/patches/102-sunxi-make_CONS_INDEX-configurable.patch b/package/boot/uboot-sunxi/patches/102-sunxi-make_CONS_INDEX-configurable.patch
deleted file mode 100644
index b85e2af9fce..00000000000
--- a/package/boot/uboot-sunxi/patches/102-sunxi-make_CONS_INDEX-configurable.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From 78d5fab8e345b1273ec8c22d06f1a1d27670b518 Mon Sep 17 00:00:00 2001
-From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
-Date: Tue, 16 Jun 2015 10:59:38 +0200
-Subject: ARM: sunxi: Make CONS_INDEX configurable
-
-
---- a/arch/arm/mach-sunxi/Kconfig
-+++ b/arch/arm/mach-sunxi/Kconfig
-@@ -559,6 +559,14 @@ config SYS_BOARD
- config SYS_SOC
- default "sunxi"
-
-+config CONS_INDEX
-+ int "UART used for console"
-+ range 1 5
-+ default 1
-+ ---help---
-+ Defines the UART port used for serial output. It starts at 1 so UART0 is 1,
-+ UART1 is 2 and so on.
-+
- config UART0_PORT_F
- bool "UART0 on MicroSD breakout board"
- default n
diff --git a/package/boot/uboot-sunxi/patches/200-mkimage-check-environment-for-dtc-binary-location.patch b/package/boot/uboot-sunxi/patches/200-mkimage-check-environment-for-dtc-binary-location.patch
index 482aa1a3693..fcc30ce35cd 100644
--- a/package/boot/uboot-sunxi/patches/200-mkimage-check-environment-for-dtc-binary-location.patch
+++ b/package/boot/uboot-sunxi/patches/200-mkimage-check-environment-for-dtc-binary-location.patch
@@ -17,7 +17,7 @@ Cc: Simon Glass <sjg@chromium.org>
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
-@@ -726,9 +726,14 @@ static int fit_handle_file(struct image_
+@@ -754,9 +754,14 @@ static int fit_handle_file(struct image_
}
*cmd = '\0';
} else if (params->datafile) {
diff --git a/package/boot/uboot-sunxi/patches/210-sunxi-deactivate-binman.patch b/package/boot/uboot-sunxi/patches/210-sunxi-deactivate-binman.patch
deleted file mode 100644
index 5efebbd056b..00000000000
--- a/package/boot/uboot-sunxi/patches/210-sunxi-deactivate-binman.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From def280c4792262a368c8861312dc6b376181021f Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke@hauke-m.de>
-Date: Mon, 1 Jan 2018 23:10:56 +0100
-Subject: sunxi: deactivate binman
-
-Use the old way to generate the images instead of binman.
-binman needs python with swig to avoid this host tool dependency use the
-old way of generating images.
----
- Makefile | 7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
---- a/Makefile
-+++ b/Makefile
-@@ -1555,8 +1555,10 @@ endif
-
- ifneq ($(CONFIG_ARCH_SUNXI),)
- ifeq ($(CONFIG_ARM64),)
--u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb FORCE
-- $(call if_changed,binman)
-+OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin = -I binary -O binary \
-+ --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff
-+u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img FORCE
-+ $(call if_changed,pad_cat)
- else
- u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.itb FORCE
- $(call if_changed,cat)
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -962,7 +962,6 @@ config ARCH_SOCFPGA
-
- config ARCH_SUNXI
- bool "Support sunxi (Allwinner) SoCs"
-- select BINMAN
- select CMD_GPIO
- select CMD_MMC if MMC
- select CMD_USB if DISTRO_DEFAULTS
diff --git a/package/boot/uboot-sunxi/patches/230-disable-axp209-on-a13-olinuxino.diff b/package/boot/uboot-sunxi/patches/230-disable-axp209-on-a13-olinuxino.diff
deleted file mode 100644
index b846cbf506d..00000000000
--- a/package/boot/uboot-sunxi/patches/230-disable-axp209-on-a13-olinuxino.diff
+++ /dev/null
@@ -1,19 +0,0 @@
---- a/configs/A13-OLinuXino_defconfig
-+++ b/configs/A13-OLinuXino_defconfig
-@@ -7,7 +7,6 @@ CONFIG_DRAM_EMR1=0
- CONFIG_MMC0_CD_PIN="PG0"
- CONFIG_USB0_VBUS_DET="PG1"
- CONFIG_USB1_VBUS_PIN="PG11"
--CONFIG_AXP_GPIO=y
- # CONFIG_VIDEO_HDMI is not set
- CONFIG_VIDEO_VGA_VIA_LCD=y
- CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y
-@@ -21,7 +20,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
- CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino"
- CONFIG_DFU_RAM=y
- CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
--CONFIG_AXP_ALDO3_VOLT=3300
-+CONFIG_SUNXI_NO_PMIC=y
- CONFIG_CONS_INDEX=2
- CONFIG_USB_EHCI_HCD=y
- CONFIG_USB_OHCI_HCD=y
diff --git a/package/boot/uboot-sunxi/patches/250-sun8i-h3-zeropi-add-device-tree.patch b/package/boot/uboot-sunxi/patches/250-sun8i-h3-zeropi-add-device-tree.patch
deleted file mode 100644
index 4250e4e9dbb..00000000000
--- a/package/boot/uboot-sunxi/patches/250-sun8i-h3-zeropi-add-device-tree.patch
+++ /dev/null
@@ -1,81 +0,0 @@
---- a/arch/arm/dts/Makefile
-+++ b/arch/arm/dts/Makefile
-@@ -539,7 +539,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
- sun8i-h3-orangepi-plus.dtb \
- sun8i-h3-orangepi-plus2e.dtb \
- sun8i-h3-orangepi-zero-plus2.dtb \
-- sun8i-h3-rervision-dvk.dtb
-+ sun8i-h3-rervision-dvk.dtb \
-+ sun8i-h3-zeropi.dtb
- dtb-$(CONFIG_MACH_SUN8I_R40) += \
- sun8i-r40-bananapi-m2-ultra.dtb \
- sun8i-v40-bananapi-m2-berry.dtb
---- /dev/null
-+++ b/arch/arm/dts/sun8i-h3-zeropi.dts
-@@ -0,0 +1,66 @@
-+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-+
-+#include "sun8i-h3-nanopi.dtsi"
-+
-+/ {
-+ model = "FriendlyElec ZeroPi";
-+ compatible = "friendlyarm,zeropi", "allwinner,sun8i-h3";
-+
-+ aliases {
-+ ethernet0 = &emac;
-+ };
-+
-+ reg_gmac_3v3: gmac-3v3 {
-+ compatible = "regulator-fixed";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&gmac_power_pin_nanopi>;
-+ regulator-name = "gmac-3v3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ startup-delay-us = <100000>;
-+ enable-active-high;
-+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
-+ };
-+};
-+
-+&ehci0 {
-+ status = "okay";
-+};
-+
-+&ohci0 {
-+ status = "okay";
-+};
-+
-+&pio {
-+ gmac_power_pin_nanopi: gmac_power_pin@0 {
-+ pins = "PD6";
-+ function = "gpio_out";
-+ };
-+};
-+
-+&external_mdio {
-+ ext_rgmii_phy: ethernet-phy@1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <7>;
-+ };
-+};
-+
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&emac_rgmii_pins>;
-+ phy-supply = <&reg_gmac_3v3>;
-+ phy-handle = <&ext_rgmii_phy>;
-+ phy-mode = "rgmii";
-+
-+ allwinner,leds-active-low;
-+ status = "okay";
-+};
-+
-+&usb_otg {
-+ status = "okay";
-+ dr_mode = "peripheral";
-+};
-+
-+&usbphy {
-+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
-+};
diff --git a/package/boot/uboot-sunxi/patches/251-sun8i-h3-zeropi-add-defconfig.patch b/package/boot/uboot-sunxi/patches/251-sun8i-h3-zeropi-add-defconfig.patch
deleted file mode 100644
index 76e333298ef..00000000000
--- a/package/boot/uboot-sunxi/patches/251-sun8i-h3-zeropi-add-defconfig.patch
+++ /dev/null
@@ -1,24 +0,0 @@
---- /dev/null
-+++ b/configs/zeropi_defconfig
-@@ -0,0 +1,21 @@
-+CONFIG_ARM=y
-+CONFIG_ARCH_SUNXI=y
-+CONFIG_MACH_SUN8I_H3=y
-+CONFIG_DRAM_CLK=408
-+CONFIG_DRAM_ZQ=3881979
-+CONFIG_DRAM_ODT_EN=y
-+CONFIG_MACPWR="PD6"
-+# CONFIG_VIDEO_DE2 is not set
-+CONFIG_NR_DRAM_BANKS=1
-+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-zeropi"
-+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-+CONFIG_CONSOLE_MUX=y
-+CONFIG_SPL=y
-+CONFIG_SYS_CLK_FREQ=480000000
-+# CONFIG_CMD_IMLS is not set
-+# CONFIG_CMD_FLASH is not set
-+# CONFIG_CMD_FPGA is not set
-+CONFIG_SUN8I_EMAC=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
diff --git a/package/boot/uboot-sunxi/patches/252-sunxi-h3-add-support-for-nanopi-r1.patch b/package/boot/uboot-sunxi/patches/252-sunxi-h3-add-support-for-nanopi-r1.patch
index 0db7be5421c..51b4d7d045b 100644
--- a/package/boot/uboot-sunxi/patches/252-sunxi-h3-add-support-for-nanopi-r1.patch
+++ b/package/boot/uboot-sunxi/patches/252-sunxi-h3-add-support-for-nanopi-r1.patch
@@ -12,168 +12,9 @@ Signed-off-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
create mode 100644 arch/arm/dts/sun8i-h3-nanopi-r1.dts
create mode 100644 configs/nanopi_r1_defconfig
---- a/arch/arm/dts/Makefile
-+++ b/arch/arm/dts/Makefile
-@@ -531,6 +531,7 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
- sun8i-h3-nanopi-m1-plus.dtb \
- sun8i-h3-nanopi-neo.dtb \
- sun8i-h3-nanopi-neo-air.dtb \
-+ sun8i-h3-nanopi-r1.dtb \
- sun8i-h3-orangepi-2.dtb \
- sun8i-h3-orangepi-lite.dtb \
- sun8i-h3-orangepi-one.dtb \
---- /dev/null
-+++ b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
-@@ -0,0 +1,146 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Copyright (C) 2019 Igor Pecovnik <igor@armbian.com>
-+ * Copyright (C) 2020 Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
-+ */
-+
-+/* NanoPi R1 is based on the NanoPi-H3 design from FriendlyARM */
-+#include "sun8i-h3-nanopi.dtsi"
-+
-+/ {
-+ model = "FriendlyARM NanoPi R1";
-+ compatible = "friendlyarm,nanopi-r1", "allwinner,sun8i-h3";
-+
-+ reg_gmac_3v3: gmac-3v3 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "gmac-3v3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ startup-delay-us = <100000>;
-+ enable-active-high;
-+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
-+ };
-+
-+ vdd_cpux: gpio-regulator {
-+ compatible = "regulator-gpio";
-+ pinctrl-names = "default";
-+ regulator-name = "vdd-cpux";
-+ regulator-type = "voltage";
-+ regulator-boot-on;
-+ regulator-always-on;
-+ regulator-min-microvolt = <1100000>;
-+ regulator-max-microvolt = <1300000>;
-+ regulator-ramp-delay = <50>;
-+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
-+ gpios-states = <0x1>;
-+ states = <1100000 0x0
-+ 1300000 0x1>;
-+ };
-+
-+ wifi_pwrseq: wifi_pwrseq {
-+ compatible = "mmc-pwrseq-simple";
-+ pinctrl-names = "default";
-+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
-+ };
-+
-+ leds {
-+ /delete-node/ pwr;
-+ status {
-+ label = "nanopi:red:status";
-+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
-+ linux,default-trigger = "heartbeat";
-+ };
-+
-+ wan {
-+ label = "nanopi:green:wan";
-+ gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>;
-+ };
-+
-+ lan {
-+ label = "nanopi:green:lan";
-+ gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>;
-+ };
-+ };
-+
-+ r_gpio_keys {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&sw_r_npi>;
-+
-+ /delete-node/ k1;
-+ reset {
-+ label = "reset";
-+ linux,code = <KEY_RESTART>;
-+ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
-+ };
-+ };
-+};
-+
-+&cpu0 {
-+ cpu-supply = <&vdd_cpux>;
-+};
-+
-+&ehci1 {
-+ status = "okay";
-+};
-+
-+&ehci2 {
-+ status = "okay";
-+};
-+
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&emac_rgmii_pins>;
-+ phy-supply = <&reg_gmac_3v3>;
-+ phy-handle = <&ext_rgmii_phy>;
-+ phy-mode = "rgmii";
-+ status = "okay";
-+};
-+
-+&external_mdio {
-+ ext_rgmii_phy: ethernet-phy@1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <7>;
-+ };
-+};
-+
-+&mmc1 {
-+ vmmc-supply = <&reg_vcc3v3>;
-+ vqmmc-supply = <&reg_vcc3v3>;
-+ mmc-pwrseq = <&wifi_pwrseq>;
-+ bus-width = <4>;
-+ non-removable;
-+ status = "okay";
-+
-+ sdio_wifi: sdio_wifi@1 {
-+ reg = <1>;
-+ compatible = "brcm,bcm4329-fmac";
-+ interrupt-parent = <&pio>;
-+ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>;
-+ interrupt-names = "host-wake";
-+ };
-+};
-+
-+&mmc2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc2_8bit_pins>;
-+ vmmc-supply = <&reg_vcc3v3>;
-+ vqmmc-supply = <&reg_vcc3v3>;
-+ bus-width = <8>;
-+ non-removable;
-+ status = "okay";
-+};
-+
-+&ohci1 {
-+ status = "okay";
-+};
-+
-+&ohci2 {
-+ status = "okay";
-+};
-+
-+&r_pio {
-+ sw_r_npi: key_pins {
-+ pins = "PL3";
-+ function = "gpio_in";
-+ };
-+};
--- /dev/null
+++ b/configs/nanopi_r1_defconfig
-@@ -0,0 +1,22 @@
+@@ -0,0 +1,21 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SPL=y
@@ -186,7 +27,6 @@ Signed-off-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
+CONFIG_NR_DRAM_BANKS=1
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_CONSOLE_MUX=y
-+CONFIG_SYS_CLK_FREQ=480000000
+# CONFIG_CMD_FLASH is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
diff --git a/package/boot/uboot-sunxi/patches/254-sunxi-h2-add-bpi-p2-zero.patch b/package/boot/uboot-sunxi/patches/254-sunxi-h2-add-bpi-p2-zero.patch
new file mode 100644
index 00000000000..9bf1a36b21f
--- /dev/null
+++ b/package/boot/uboot-sunxi/patches/254-sunxi-h2-add-bpi-p2-zero.patch
@@ -0,0 +1,307 @@
+--- /dev/null
++++ b/arch/arm/dts/sun8i-h2-plus-bananapi-p2-zero.dts
+@@ -0,0 +1,291 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (C) 2023 Zoltan HERPAI <wigyori@uid0.hu>
++ *
++ * Based on sun8i-h2-plus-bananapi-m2-zero.dts, which is:
++ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
++ */
++
++/dts-v1/;
++#include "sun8i-h3.dtsi"
++#include "sunxi-common-regulators.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
++
++/ {
++ model = "Banana Pi BPI-P2-Zero";
++ compatible = "sinovoip,bpi-p2-zero", "allwinner,sun8i-h2-plus";
++
++ aliases {
++ serial0 = &uart0;
++ serial1 = &uart1;
++ ethernet0 = &emac;
++ };
++
++ chosen {
++ stdout-path = "serial0:115200n8";
++ };
++
++ connector {
++ compatible = "hdmi-connector";
++ type = "c";
++
++ port {
++ hdmi_con_in: endpoint {
++ remote-endpoint = <&hdmi_out_con>;
++ };
++ };
++ };
++
++ leds {
++ compatible = "gpio-leds";
++
++ pwr_led {
++ label = "bananapi-p2-zero:red:pwr";
++ gpios = <&r_pio 0 10 GPIO_ACTIVE_LOW>; /* PL10 */
++ default-state = "on";
++ };
++ };
++
++ gpio-keys {
++ compatible = "gpio-keys";
++
++ switch-4 {
++ label = "power";
++ linux,code = <KEY_POWER>;
++ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
++ wakeup-source;
++ };
++ };
++
++ reg_vdd_cpux: vdd-cpux-regulator {
++ compatible = "regulator-gpio";
++ regulator-name = "vdd-cpux";
++ regulator-type = "voltage";
++ regulator-boot-on;
++ regulator-always-on;
++ regulator-min-microvolt = <1100000>;
++ regulator-max-microvolt = <1300000>;
++ regulator-ramp-delay = <50>; /* 4ms */
++
++ gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
++ enable-active-high;
++ gpios-states = <0x1>;
++ states = <1100000 0>, <1300000 1>;
++ };
++
++ reg_vcc_dram: vcc-dram {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc-dram";
++ regulator-min-microvolt = <1500000>;
++ regulator-max-microvolt = <1500000>;
++ regulator-always-on;
++ regulator-boot-on;
++ enable-active-high;
++ gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
++ vin-supply = <&reg_vcc5v0>;
++ };
++
++ reg_vcc1v2: vcc1v2 {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc1v2";
++ regulator-min-microvolt = <1200000>;
++ regulator-max-microvolt = <1200000>;
++ regulator-always-on;
++ regulator-boot-on;
++ enable-active-high;
++ gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
++ vin-supply = <&reg_vcc5v0>;
++ };
++
++ poweroff {
++ compatible = "regulator-poweroff";
++ cpu-supply = <&reg_vcc1v2>;
++ };
++
++ wifi_pwrseq: wifi_pwrseq {
++ compatible = "mmc-pwrseq-simple";
++ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
++ clocks = <&rtc CLK_OSC32K_FANOUT>;
++ clock-names = "ext_clock";
++ };
++};
++
++&cpu0 {
++ cpu-supply = <&reg_vdd_cpux>;
++};
++
++&de {
++ status = "okay";
++};
++
++&ehci0 {
++ status = "okay";
++};
++
++&emac {
++ phy-handle = <&int_mii_phy>;
++ phy-mode = "mii";
++ allwinner,leds-active-low;
++ status = "okay";
++};
++
++&hdmi {
++ status = "okay";
++};
++
++&hdmi_out {
++ hdmi_out_con: endpoint {
++ remote-endpoint = <&hdmi_con_in>;
++ };
++};
++
++&mmc0 {
++ vmmc-supply = <&reg_vcc3v3>;
++ bus-width = <4>;
++ /*
++ * On the production batch of this board the card detect GPIO is
++ * high active (card inserted), although on the early samples it's
++ * low active.
++ */
++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
++ status = "okay";
++};
++
++&mmc1 {
++ vmmc-supply = <&reg_vcc3v3>;
++ vqmmc-supply = <&reg_vcc3v3>;
++ mmc-pwrseq = <&wifi_pwrseq>;
++ bus-width = <4>;
++ non-removable;
++ status = "okay";
++
++ brcmf: wifi@1 {
++ reg = <1>;
++ compatible = "brcm,bcm4329-fmac";
++ interrupt-parent = <&pio>;
++ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
++ interrupt-names = "host-wake";
++ };
++};
++
++&mmc2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&mmc2_8bit_pins>;
++ vmmc-supply = <&reg_vcc3v3>;
++ vqmmc-supply = <&reg_vcc3v3>;
++ bus-width = <8>;
++ non-removable;
++ status = "okay";
++};
++
++&ohci0 {
++ status = "okay";
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_pa_pins>;
++ status = "okay";
++};
++
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
++ uart-has-rtscts;
++ status = "okay";
++
++ bluetooth {
++ compatible = "brcm,bcm43438-bt";
++ max-speed = <1500000>;
++ clocks = <&rtc CLK_OSC32K_FANOUT>;
++ clock-names = "lpo";
++ vbat-supply = <&reg_vcc3v3>;
++ vddio-supply = <&reg_vcc3v3>;
++ device-wakeup-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
++ host-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
++ shutdown-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
++ };
++
++};
++
++&pio {
++ gpio-line-names =
++ /* PA */
++ "CON2-P13", "CON2-P11", "CON2-P22", "CON2-P15",
++ "CON3-P03", "CON3-P02", "CON2-P07", "CON2-P29",
++ "CON2-P31", "CON2-P33", "CON2-P35", "CON2-P05",
++ "CON2-P03", "CON2-P08", "CON2-P10", "CON2-P16",
++ "CON2-P12", "CON2-P37", "CON2-P28", "CON2-P27",
++ "CON2-P40", "CON2-P38", "", "",
++ "", "", "", "", "", "", "", "",
++
++ /* PB */
++ "", "", "", "", "", "", "", "",
++ "", "", "", "", "", "", "", "",
++ "", "", "", "", "", "", "", "",
++ "", "", "", "", "", "", "", "",
++
++ /* PC */
++ "CON2-P19", "CON2-P21", "CON2-P23", "CON2-P24",
++ "CON2-P18", "", "", "CON2-P26",
++ "", "", "", "", "", "", "", "",
++ "", "", "", "", "", "", "", "",
++ "", "", "", "", "", "", "", "",
++
++ /* PD */
++ "", "", "", "", "", "", "", "",
++ "", "", "", "", "", "", "CSI-PWR-EN", "",
++ "", "", "", "", "", "", "", "",
++ "", "", "", "", "", "", "", "",
++
++ /* PE */
++ "CN3-P17", "CN3-P13", "CN3-P09", "CN3-P07",
++ "CN3-P19", "CN3-P21", "CN3-P22", "CN3-P20",
++ "CN3-P18", "CN3-P16", "CN3-P14", "CN3-P12",
++ "CN3-P05", "CN3-P03", "CN3-P06", "CN3-P08",
++ "", "", "", "", "", "", "", "",
++ "", "", "", "", "", "", "", "",
++
++ /* PF */
++ "SDC0-D1", "SDC0-D0", "SDC0-CLK", "SDC0-CMD", "SDC0-D3",
++ "SDC0-D2", "SDC0-DET", "",
++ "", "", "", "", "", "", "", "",
++ "", "", "", "", "", "", "", "",
++ "", "", "", "", "", "", "", "",
++
++ /* PG */
++ "WL-SDIO-CLK", "WL-SDIO-CMD", "WL-SDIO-D0", "WL-SDIO-D1",
++ "WL-SDIO-D2", "WL-SDIO-D3", "BT-UART-TX", "BT-UART-RX",
++ "BT-UART-RTS", "BT-UART-CTS", "WL-WAKE-AP", "BT-WAKE-AP",
++ "BT-RST-N", "AP-WAKE-BT", "", "",
++ "", "", "", "", "", "", "", "",
++ "", "", "", "", "", "", "", "";
++};
++
++&r_pio {
++ gpio-line-names =
++ /* PL */
++ "", "CPUX-SET", "CON2-P32", "POWER-KEY", "CON2-P36",
++ "VCC-IO-EN", "USB0-ID", "WL-PWR-EN",
++ "PWR-STB", "PWR-DRAM", "PWR-LED", "IR-RX", "", "", "", "",
++ "", "", "", "", "", "", "", "",
++ "", "", "", "", "", "", "", "";
++};
++
++&usb_otg {
++ dr_mode = "otg";
++ status = "okay";
++};
++
++&usbphy {
++ usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
++ /*
++ * There're two micro-USB connectors, one is power-only and another is
++ * OTG. The Vbus of these two connectors are connected together, so
++ * the external USB device will be powered just by the power input
++ * from the power-only USB port.
++ */
++ status = "okay";
++};
+--- /dev/null
++++ b/configs/bananapi_p2_zero_defconfig
+@@ -0,0 +1,10 @@
++CONFIG_ARM=y
++CONFIG_ARCH_SUNXI=y
++CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-bananapi-p2-zero"
++CONFIG_SPL=y
++CONFIG_MACH_SUN8I_H3=y
++CONFIG_DRAM_CLK=408
++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
++CONFIG_MMC_SUNXI_SLOT_EXTRA=2
++CONFIG_SUN8I_EMAC=y
++CONFIG_USB_EHCI_HCD=y
diff --git a/package/boot/uboot-sunxi/patches/260-add-missing-type-u64.patch b/package/boot/uboot-sunxi/patches/260-add-missing-type-u64.patch
deleted file mode 100644
index a6204c7b69e..00000000000
--- a/package/boot/uboot-sunxi/patches/260-add-missing-type-u64.patch
+++ /dev/null
@@ -1,10 +0,0 @@
---- a/include/linux/types.h
-+++ b/include/linux/types.h
-@@ -1,6 +1,7 @@
- #ifndef _LINUX_TYPES_H
- #define _LINUX_TYPES_H
-
-+typedef unsigned long long __u64;
- #include <linux/posix_types.h>
- #include <asm/types.h>
- #include <stdbool.h>
diff --git a/package/boot/uboot-sunxi/uEnv-default.txt b/package/boot/uboot-sunxi/uEnv-default.txt
index e024954516c..36e41c59b12 100644
--- a/package/boot/uboot-sunxi/uEnv-default.txt
+++ b/package/boot/uboot-sunxi/uEnv-default.txt
@@ -1,6 +1,8 @@
setenv fdt_high ffffffff
-setenv loadkernel fatload mmc 0 \$kernel_addr_r uImage
-setenv loaddtb fatload mmc 0 \$fdt_addr_r dtb
-setenv bootargs console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rootwait
+setenv mmc_rootpart 2
+part uuid mmc ${mmc_bootdev}:${mmc_rootpart} uuid
+setenv loadkernel fatload mmc \$mmc_bootdev \$kernel_addr_r uImage
+setenv loaddtb fatload mmc \$mmc_bootdev \$fdt_addr_r dtb
+setenv bootargs console=ttyS0,115200 earlyprintk root=PARTUUID=${uuid} rootwait
setenv uenvcmd run loadkernel \&\& run loaddtb \&\& bootm \$kernel_addr_r - \$fdt_addr_r
run uenvcmd
diff --git a/package/boot/uboot-sunxi/uEnv-h616.txt b/package/boot/uboot-sunxi/uEnv-h616.txt
new file mode 100644
index 00000000000..78810ff223c
--- /dev/null
+++ b/package/boot/uboot-sunxi/uEnv-h616.txt
@@ -0,0 +1,7 @@
+setenv mmc_rootpart 2
+part uuid mmc ${mmc_bootdev}:${mmc_rootpart} uuid
+setenv loadkernel fatload mmc \$mmc_bootdev \$kernel_addr_r uImage
+setenv loaddtb fatload mmc \$mmc_bootdev \$fdt_addr_r dtb
+setenv bootargs console=ttyS0,115200 earlyprintk root=PARTUUID=${uuid} rootwait
+setenv uenvcmd run loadkernel \&\& run loaddtb \&\& booti \$kernel_addr_r - \$fdt_addr_r
+run uenvcmd