aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--toolchain/gcc/patches/10.1.0/002-case_insensitive.patch2
-rw-r--r--toolchain/gcc/patches/10.1.0/010-documentation.patch2
-rw-r--r--toolchain/gcc/patches/10.1.0/110-Fix-MIPS-PR-84790.patch2
-rw-r--r--toolchain/gcc/patches/10.1.0/230-musl_libssp.patch2
-rw-r--r--toolchain/gcc/patches/10.1.0/300-mips_Os_cpu_rtx_cost_model.patch2
-rw-r--r--toolchain/gcc/patches/10.1.0/820-libgcc_pic.patch6
-rw-r--r--toolchain/gcc/patches/10.1.0/840-armv4_pass_fix-v4bx_to_ld.patch2
-rw-r--r--toolchain/gcc/patches/10.1.0/850-use_shared_libgcc.patch2
-rw-r--r--toolchain/gcc/patches/10.1.0/870-ppc_no_crtsavres.patch6
-rw-r--r--toolchain/gcc/patches/10.1.0/881-no_tm_section.patch4
-rw-r--r--toolchain/gcc/patches/10.1.0/910-mbsd_multi.patch14
-rw-r--r--toolchain/gcc/patches/10.1.0/920-specs_nonfatal_getenv.patch2
-rw-r--r--toolchain/gcc/patches/10.1.0/930-fix-mips-noexecstack.patch22
13 files changed, 34 insertions, 34 deletions
diff --git a/toolchain/gcc/patches/10.1.0/002-case_insensitive.patch b/toolchain/gcc/patches/10.1.0/002-case_insensitive.patch
index 3442076d7d..409497e5a3 100644
--- a/toolchain/gcc/patches/10.1.0/002-case_insensitive.patch
+++ b/toolchain/gcc/patches/10.1.0/002-case_insensitive.patch
@@ -10,7 +10,7 @@ Date: Sun Oct 19 21:45:51 2014 +0000
--- a/include/filenames.h
+++ b/include/filenames.h
-@@ -43,11 +43,6 @@ extern "C" {
+@@ -44,11 +44,6 @@ extern "C" {
# define IS_DIR_SEPARATOR(c) IS_DOS_DIR_SEPARATOR (c)
# define IS_ABSOLUTE_PATH(f) IS_DOS_ABSOLUTE_PATH (f)
#else /* not DOSish */
diff --git a/toolchain/gcc/patches/10.1.0/010-documentation.patch b/toolchain/gcc/patches/10.1.0/010-documentation.patch
index c3a6a15901..9783ff1ef0 100644
--- a/toolchain/gcc/patches/10.1.0/010-documentation.patch
+++ b/toolchain/gcc/patches/10.1.0/010-documentation.patch
@@ -12,7 +12,7 @@ Date: Tue Feb 26 16:16:33 2013 +0000
--- a/gcc/Makefile.in
+++ b/gcc/Makefile.in
-@@ -3203,18 +3203,10 @@ doc/gcc.info: $(TEXI_GCC_FILES)
+@@ -3283,18 +3283,10 @@ doc/gcc.info: $(TEXI_GCC_FILES)
doc/gccint.info: $(TEXI_GCCINT_FILES)
doc/cppinternals.info: $(TEXI_CPPINT_FILES)
diff --git a/toolchain/gcc/patches/10.1.0/110-Fix-MIPS-PR-84790.patch b/toolchain/gcc/patches/10.1.0/110-Fix-MIPS-PR-84790.patch
index c7e60e3157..82ac013d30 100644
--- a/toolchain/gcc/patches/10.1.0/110-Fix-MIPS-PR-84790.patch
+++ b/toolchain/gcc/patches/10.1.0/110-Fix-MIPS-PR-84790.patch
@@ -5,7 +5,7 @@ instructions.
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
-@@ -3131,6 +3131,12 @@ mips_emit_call_insn (rtx pattern, rtx or
+@@ -3132,6 +3132,12 @@ mips_emit_call_insn (rtx pattern, rtx or
emit_insn (gen_update_got_version ());
}
diff --git a/toolchain/gcc/patches/10.1.0/230-musl_libssp.patch b/toolchain/gcc/patches/10.1.0/230-musl_libssp.patch
index 41d75b0206..63f37662f4 100644
--- a/toolchain/gcc/patches/10.1.0/230-musl_libssp.patch
+++ b/toolchain/gcc/patches/10.1.0/230-musl_libssp.patch
@@ -1,6 +1,6 @@
--- a/gcc/gcc.c
+++ b/gcc/gcc.c
-@@ -876,7 +876,9 @@ proper position among the other output f
+@@ -875,7 +875,9 @@ proper position among the other output f
#endif
#ifndef LINK_SSP_SPEC
diff --git a/toolchain/gcc/patches/10.1.0/300-mips_Os_cpu_rtx_cost_model.patch b/toolchain/gcc/patches/10.1.0/300-mips_Os_cpu_rtx_cost_model.patch
index 5caa852a16..8c4a5fce19 100644
--- a/toolchain/gcc/patches/10.1.0/300-mips_Os_cpu_rtx_cost_model.patch
+++ b/toolchain/gcc/patches/10.1.0/300-mips_Os_cpu_rtx_cost_model.patch
@@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
-@@ -19994,7 +19994,7 @@ mips_option_override (void)
+@@ -20041,7 +20041,7 @@ mips_option_override (void)
flag_pcc_struct_return = 0;
/* Decide which rtx_costs structure to use. */
diff --git a/toolchain/gcc/patches/10.1.0/820-libgcc_pic.patch b/toolchain/gcc/patches/10.1.0/820-libgcc_pic.patch
index 0a316d35bf..ddd6cf8732 100644
--- a/toolchain/gcc/patches/10.1.0/820-libgcc_pic.patch
+++ b/toolchain/gcc/patches/10.1.0/820-libgcc_pic.patch
@@ -8,7 +8,7 @@ Date: Mon Oct 19 23:26:09 2009 +0000
--- a/libgcc/Makefile.in
+++ b/libgcc/Makefile.in
-@@ -927,11 +927,12 @@ $(libgcov-driver-objects): %$(objext): $
+@@ -929,11 +929,12 @@ $(libgcov-driver-objects): %$(objext): $
# Static libraries.
libgcc.a: $(libgcc-objects)
@@ -22,7 +22,7 @@ Date: Mon Oct 19 23:26:09 2009 +0000
-rm -f $@
objects="$(objects)"; \
-@@ -955,7 +956,7 @@ all: libunwind.a
+@@ -957,7 +958,7 @@ all: libunwind.a
endif
ifeq ($(enable_shared),yes)
@@ -31,7 +31,7 @@ Date: Mon Oct 19 23:26:09 2009 +0000
ifneq ($(LIBUNWIND),)
all: libunwind$(SHLIB_EXT)
libgcc_s$(SHLIB_EXT): libunwind$(SHLIB_EXT)
-@@ -1161,6 +1162,10 @@ install-shared:
+@@ -1163,6 +1164,10 @@ install-shared:
chmod 644 $(DESTDIR)$(inst_libdir)/libgcc_eh.a
$(RANLIB) $(DESTDIR)$(inst_libdir)/libgcc_eh.a
diff --git a/toolchain/gcc/patches/10.1.0/840-armv4_pass_fix-v4bx_to_ld.patch b/toolchain/gcc/patches/10.1.0/840-armv4_pass_fix-v4bx_to_ld.patch
index 18aa021b93..e3cb616c4e 100644
--- a/toolchain/gcc/patches/10.1.0/840-armv4_pass_fix-v4bx_to_ld.patch
+++ b/toolchain/gcc/patches/10.1.0/840-armv4_pass_fix-v4bx_to_ld.patch
@@ -11,7 +11,7 @@ Date: Wed Feb 2 19:34:36 2011 +0000
+++ b/gcc/config/arm/linux-eabi.h
@@ -91,10 +91,15 @@
#define MUSL_DYNAMIC_LINKER \
- "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
+ "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1"
+/* For armv4 we pass --fix-v4bx to linker to support EABI */
+#undef TARGET_FIX_V4BX_SPEC
diff --git a/toolchain/gcc/patches/10.1.0/850-use_shared_libgcc.patch b/toolchain/gcc/patches/10.1.0/850-use_shared_libgcc.patch
index a765e55a46..8b17f1374f 100644
--- a/toolchain/gcc/patches/10.1.0/850-use_shared_libgcc.patch
+++ b/toolchain/gcc/patches/10.1.0/850-use_shared_libgcc.patch
@@ -7,7 +7,7 @@ Date: Sun Feb 12 20:25:47 2012 +0000
SVN-Revision: 30486
--- a/gcc/config/arm/linux-eabi.h
+++ b/gcc/config/arm/linux-eabi.h
-@@ -129,10 +129,6 @@
+@@ -132,10 +132,6 @@
"%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} " \
LINUX_OR_ANDROID_LD (GNU_USER_TARGET_ENDFILE_SPEC, ANDROID_ENDFILE_SPEC)
diff --git a/toolchain/gcc/patches/10.1.0/870-ppc_no_crtsavres.patch b/toolchain/gcc/patches/10.1.0/870-ppc_no_crtsavres.patch
index 6ec22dd201..bc182f0cec 100644
--- a/toolchain/gcc/patches/10.1.0/870-ppc_no_crtsavres.patch
+++ b/toolchain/gcc/patches/10.1.0/870-ppc_no_crtsavres.patch
@@ -1,6 +1,6 @@
---- a/gcc/config/rs6000/rs6000.c
-+++ b/gcc/config/rs6000/rs6000.c
-@@ -24474,7 +24474,7 @@ rs6000_savres_strategy (rs6000_stack_t *
+--- a/gcc/config/rs6000/rs6000-logue.c
++++ b/gcc/config/rs6000/rs6000-logue.c
+@@ -348,7 +348,7 @@ rs6000_savres_strategy (rs6000_stack_t *
/* Define cutoff for using out-of-line functions to save registers. */
if (DEFAULT_ABI == ABI_V4 || TARGET_ELF)
{
diff --git a/toolchain/gcc/patches/10.1.0/881-no_tm_section.patch b/toolchain/gcc/patches/10.1.0/881-no_tm_section.patch
index fab5db3be5..2029910fd0 100644
--- a/toolchain/gcc/patches/10.1.0/881-no_tm_section.patch
+++ b/toolchain/gcc/patches/10.1.0/881-no_tm_section.patch
@@ -6,6 +6,6 @@
#if !defined(USE_TM_CLONE_REGISTRY) && defined(OBJECT_FORMAT_ELF)
-# define USE_TM_CLONE_REGISTRY 1
+# define USE_TM_CLONE_REGISTRY 0
+ #elif !defined(USE_TM_CLONE_REGISTRY)
+ # define USE_TM_CLONE_REGISTRY 0
#endif
-
- /* We do not want to add the weak attribute to the declarations of these
diff --git a/toolchain/gcc/patches/10.1.0/910-mbsd_multi.patch b/toolchain/gcc/patches/10.1.0/910-mbsd_multi.patch
index 8908e7bfcf..452cc1cb4e 100644
--- a/toolchain/gcc/patches/10.1.0/910-mbsd_multi.patch
+++ b/toolchain/gcc/patches/10.1.0/910-mbsd_multi.patch
@@ -27,7 +27,7 @@ Date: Tue Jul 31 00:52:27 2007 +0000
static void handle_OPT_d (const char *);
static void set_std_cxx98 (int);
static void set_std_cxx11 (int);
-@@ -452,6 +455,12 @@ c_common_handle_option (size_t scode, co
+@@ -455,6 +458,12 @@ c_common_handle_option (size_t scode, co
flag_no_builtin = !value;
break;
@@ -40,7 +40,7 @@ Date: Tue Jul 31 00:52:27 2007 +0000
case OPT_fconstant_string_class_:
constant_string_class_name = arg;
break;
-@@ -1138,6 +1147,47 @@ c_common_init (void)
+@@ -1168,6 +1177,47 @@ c_common_init (void)
return false;
}
@@ -90,9 +90,9 @@ Date: Tue Jul 31 00:52:27 2007 +0000
--- a/gcc/c-family/c.opt
+++ b/gcc/c-family/c.opt
-@@ -1521,6 +1521,9 @@ C++ ObjC++ Optimization Alias(fexception
+@@ -1590,6 +1590,9 @@ C++ ObjC++ Optimization Alias(fexception
fhonor-std
- C++ ObjC++ Deprecated
+ C++ ObjC++ WarnRemoved
+fhonour-copts
+C ObjC C++ ObjC++ RejectNegative
@@ -102,7 +102,7 @@ Date: Tue Jul 31 00:52:27 2007 +0000
Assume normal C execution environment.
--- a/gcc/common.opt
+++ b/gcc/common.opt
-@@ -1589,6 +1589,9 @@ fguess-branch-probability
+@@ -1657,6 +1657,9 @@ fguess-branch-probability
Common Report Var(flag_guess_branch_prob) Optimization
Enable guessing of branch probabilities.
@@ -114,7 +114,7 @@ Date: Tue Jul 31 00:52:27 2007 +0000
; On SVR4 targets, it also controls whether or not to emit a
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
-@@ -7666,6 +7666,17 @@ This option is only supported for C and
+@@ -8169,6 +8169,17 @@ This option is only supported for C and
@option{-Wall} and by @option{-Wpedantic}, which can be disabled with
@option{-Wno-pointer-sign}.
@@ -134,7 +134,7 @@ Date: Tue Jul 31 00:52:27 2007 +0000
@opindex Wno-stack-protector
--- a/gcc/opts.c
+++ b/gcc/opts.c
-@@ -2314,6 +2314,9 @@ common_handle_option (struct gcc_options
+@@ -2308,6 +2308,9 @@ common_handle_option (struct gcc_options
/* Currently handled in a prescan. */
break;
diff --git a/toolchain/gcc/patches/10.1.0/920-specs_nonfatal_getenv.patch b/toolchain/gcc/patches/10.1.0/920-specs_nonfatal_getenv.patch
index db27950de8..487b9e47cb 100644
--- a/toolchain/gcc/patches/10.1.0/920-specs_nonfatal_getenv.patch
+++ b/toolchain/gcc/patches/10.1.0/920-specs_nonfatal_getenv.patch
@@ -7,7 +7,7 @@ Date: Sat Apr 21 03:02:39 2012 +0000
--- a/gcc/gcc.c
+++ b/gcc/gcc.c
-@@ -9318,8 +9318,10 @@ getenv_spec_function (int argc, const ch
+@@ -9396,8 +9396,10 @@ getenv_spec_function (int argc, const ch
}
if (!value)
diff --git a/toolchain/gcc/patches/10.1.0/930-fix-mips-noexecstack.patch b/toolchain/gcc/patches/10.1.0/930-fix-mips-noexecstack.patch
index 95d13abad0..e795acd1de 100644
--- a/toolchain/gcc/patches/10.1.0/930-fix-mips-noexecstack.patch
+++ b/toolchain/gcc/patches/10.1.0/930-fix-mips-noexecstack.patch
@@ -48,9 +48,9 @@ sellcey@mips.com
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
-@@ -22822,6 +22822,9 @@ mips_starting_frame_offset (void)
- #undef TARGET_STARTING_FRAME_OFFSET
- #define TARGET_STARTING_FRAME_OFFSET mips_starting_frame_offset
+@@ -22881,6 +22881,9 @@ mips_asm_file_end (void)
+ #define TARGET_ASM_FILE_END mips_asm_file_end
+
+#undef TARGET_ASM_FILE_END
+#define TARGET_ASM_FILE_END file_end_indicate_exec_stack
@@ -60,9 +60,9 @@ sellcey@mips.com
#include "gt-mips.h"
--- a/libgcc/config/mips/crti.S
+++ b/libgcc/config/mips/crti.S
-@@ -21,6 +21,10 @@ a copy of the GCC Runtime Library Except
- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
- <http://www.gnu.org/licenses/>. */
+@@ -24,6 +24,10 @@ see the files COPYING3 and COPYING.RUNTI
+ /* An executable stack is *not* required for these functions. */
+ #include "gnustack.h"
+
+/* An executable stack is *not* required for these functions. */
@@ -73,9 +73,9 @@ sellcey@mips.com
--- a/libgcc/config/mips/crtn.S
+++ b/libgcc/config/mips/crtn.S
-@@ -21,6 +21,9 @@ a copy of the GCC Runtime Library Except
- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
- <http://www.gnu.org/licenses/>. */
+@@ -24,6 +24,9 @@ see the files COPYING3 and COPYING.RUNTI
+ /* An executable stack is *not* required for these functions. */
+ #include "gnustack.h"
+/* An executable stack is *not* required for these functions. */
+ .section .note.GNU-stack,"",%progbits
@@ -85,7 +85,7 @@ sellcey@mips.com
--- a/libgcc/config/mips/mips16.S
+++ b/libgcc/config/mips/mips16.S
-@@ -48,6 +48,10 @@ see the files COPYING3 and COPYING.RUNTI
+@@ -51,6 +51,10 @@ see the files COPYING3 and COPYING.RUNTI
values using the soft-float calling convention, but do the actual
operation using the hard floating point instructions. */
@@ -98,7 +98,7 @@ sellcey@mips.com
/* This file contains 32-bit assembly code. */
--- a/libgcc/config/mips/vr4120-div.S
+++ b/libgcc/config/mips/vr4120-div.S
-@@ -26,6 +26,10 @@ see the files COPYING3 and COPYING.RUNTI
+@@ -29,6 +29,10 @@ see the files COPYING3 and COPYING.RUNTI
-mfix-vr4120. div and ddiv do not give the correct result when one
of the operands is negative. */