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authorRyan Mounce <ryan@mounce.com.au>2017-10-12 11:51:36 +1030
committerHauke Mehrtens <hauke@hauke-m.de>2017-10-15 00:24:22 +0200
commitd67979b9d61e4b726431ba97bfed325ad31b3e97 (patch)
treef4b9f54d1868a12deda513c139254c9078272dec /toolchain/gcc/patches/5.5.0/040-fix-mips-ICE-PR-68400.patch
parentf81b353c9f33f5afa32eebe0ee1dc290e927e5ee (diff)
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toolchain/gcc: update 5.x to 5.5.0
This is the final bugfix release in the gcc-5 series. Compile and run tested on macOS 10.13 (Xcode 9), mvebu/ar71xx. Removed redundant patch for macOS (backported upstream by yours truly) Signed-off-by: Ryan Mounce <ryan@mounce.com.au>
Diffstat (limited to 'toolchain/gcc/patches/5.5.0/040-fix-mips-ICE-PR-68400.patch')
-rw-r--r--toolchain/gcc/patches/5.5.0/040-fix-mips-ICE-PR-68400.patch23
1 files changed, 23 insertions, 0 deletions
diff --git a/toolchain/gcc/patches/5.5.0/040-fix-mips-ICE-PR-68400.patch b/toolchain/gcc/patches/5.5.0/040-fix-mips-ICE-PR-68400.patch
new file mode 100644
index 0000000000..e88af34032
--- /dev/null
+++ b/toolchain/gcc/patches/5.5.0/040-fix-mips-ICE-PR-68400.patch
@@ -0,0 +1,23 @@
+--- a/gcc/config/mips/mips.c
++++ b/gcc/config/mips/mips.c
+@@ -8001,9 +8001,17 @@ mask_low_and_shift_p (machine_mode mode,
+ bool
+ and_operands_ok (machine_mode mode, rtx op1, rtx op2)
+ {
+- return (memory_operand (op1, mode)
+- ? and_load_operand (op2, mode)
+- : and_reg_operand (op2, mode));
++ if (!memory_operand (op1, mode))
++ return and_reg_operand (op2, mode);
++
++ if (!and_load_operand (op2, mode))
++ return false;
++
++ if (!TARGET_MIPS16 || si_mask_operand(op2, mode))
++ return true;
++
++ op1 = XEXP (op1, 0);
++ return !(REG_P (op1) && REGNO (op1) == STACK_POINTER_REGNUM);
+ }
+
+ /* The canonical form of a mask-low-and-shift-left operation is