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| author | Sebastian Schaper <openwrt@sebastianschaper.net> | 2020-05-19 12:38:21 +0200 |
|---|---|---|
| committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2020-05-26 22:49:18 +0200 |
| commit | 8643c0b53d74aeb535c6700c115d323cb55ec7fb (patch) | |
| tree | 5b39aff4db00537accd42354a7b57b99bf4c1530 /target | |
| parent | 6ce1e299be13800dbc49821b1faad5e934b91f09 (diff) | |
| download | upstream-8643c0b53d74aeb535c6700c115d323cb55ec7fb.tar.gz upstream-8643c0b53d74aeb535c6700c115d323cb55ec7fb.tar.bz2 upstream-8643c0b53d74aeb535c6700c115d323cb55ec7fb.zip | |
ath79: define switch reset-gpios for D-Link DIR-842
GPIO 11 needs to be pulled high for the external gigabit switch to work,
this is currently solved via gpio-hog. Replace with phy0 reset-gpios.
Tested on revisions C1 and C3. Reset button is still working for reboot,
to enter failsafe, and to enter bootloader http recovery.
Signed-off-by: Sebastian Schaper <openwrt@sebastianschaper.net>
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/ath79/dts/qca9563_dlink_dir-842-c.dtsi | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/target/linux/ath79/dts/qca9563_dlink_dir-842-c.dtsi b/target/linux/ath79/dts/qca9563_dlink_dir-842-c.dtsi index 2482874c99..8071332451 100644 --- a/target/linux/ath79/dts/qca9563_dlink_dir-842-c.dtsi +++ b/target/linux/ath79/dts/qca9563_dlink_dir-842-c.dtsi @@ -25,14 +25,6 @@ debounce-interval = <60>; }; }; - - // Pull up on boot - otherwise the reset button won't work - reset-button { - gpio-hog; - output-high; - gpios = <11 GPIO_ACTIVE_LOW>; - line-name = "reset-button"; - }; }; &uart { @@ -116,6 +108,7 @@ phy0: ethernet-phy@0 { reg = <0>; qca,mib-poll-interval = <500>; + reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>; qca,ar8327-initvals = < 0x04 0x00080080 /* PORT0 PAD MODE CTRL */ @@ -140,5 +133,6 @@ &wmac { status = "okay"; + qca,no-eeprom; }; |