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author | Rafał Miłecki <rafal@milecki.pl> | 2021-08-29 22:53:55 +0200 |
---|---|---|
committer | Rafał Miłecki <rafal@milecki.pl> | 2022-12-04 12:06:24 +0100 |
commit | 8035ac01950758d96b92085b9f213b12e4039691 (patch) | |
tree | f34a2278e7f7dddee9d4d8dccb4d7ad5015f03a7 /target | |
parent | 06bec8462570adc81020c3b5dd22fab25eae5060 (diff) | |
download | upstream-8035ac01950758d96b92085b9f213b12e4039691.tar.gz upstream-8035ac01950758d96b92085b9f213b12e4039691.tar.bz2 upstream-8035ac01950758d96b92085b9f213b12e4039691.zip |
bcm53xx: backport the latest upstream DT changes
This includes:
1. BCM5301X changes from 5.14 and queued 5.15 stuff
2. NSP changes from 5.11 - 5.15 for kernel 5.10
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit bce00f47e5d67e5a33e9d7fa137cbe0a5d3d334b)
Diffstat (limited to 'target')
16 files changed, 1552 insertions, 0 deletions
diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.11-0013-ARM-dts-NSP-Update-ethernet-switch-node-name.patch b/target/linux/bcm53xx/patches-5.4/034-v5.11-0013-ARM-dts-NSP-Update-ethernet-switch-node-name.patch new file mode 100644 index 0000000000..3828bb57c4 --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/034-v5.11-0013-ARM-dts-NSP-Update-ethernet-switch-node-name.patch @@ -0,0 +1,32 @@ +From fd66cd0d79cb836badecb91fdd19afd32afbb443 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli <f.fainelli@gmail.com> +Date: Mon, 9 Nov 2020 12:02:08 -0800 +Subject: [PATCH 13/16] ARM: dts: NSP: Update ethernet switch node name + +Update the switch unit name from srab to ethernet-switch, allowing us +to fix warnings such as: + + CHECK arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml + arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml: + srab@18007000: $nodename:0: 'srab@18007000' does not match + '^(ethernet-)?switch(@.*)?$' + From schema: + Documentation/devicetree/bindings/net/dsa/b53.yaml + +Reviewed-by: Vladimir Oltean <olteanv@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm-nsp.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm-nsp.dtsi ++++ b/arch/arm/boot/dts/bcm-nsp.dtsi +@@ -383,7 +383,7 @@ + clock-names = "apb_pclk"; + }; + +- srab: srab@36000 { ++ srab: ethernet-switch@36000 { + compatible = "brcm,nsp-srab"; + reg = <0x36000 0x1000>, + <0x3f308 0x8>, diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.11-0014-ARM-dts-NSP-Fix-Ethernet-switch-SGMII-register-name.patch b/target/linux/bcm53xx/patches-5.4/034-v5.11-0014-ARM-dts-NSP-Fix-Ethernet-switch-SGMII-register-name.patch new file mode 100644 index 0000000000..e8313d89b2 --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/034-v5.11-0014-ARM-dts-NSP-Fix-Ethernet-switch-SGMII-register-name.patch @@ -0,0 +1,26 @@ +From 8b0235d1deace8f1bd8cdd149d698fee3974fdf4 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli <f.fainelli@gmail.com> +Date: Mon, 9 Nov 2020 12:06:15 -0800 +Subject: [PATCH 14/16] ARM: dts: NSP: Fix Ethernet switch SGMII register name + +The register name should be "sgmii_config", not "sgmii", this is not a +functional change since no code is currently looking for that register +by name (or at all). + +Reviewed-by: Vladimir Oltean <olteanv@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm-nsp.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm-nsp.dtsi ++++ b/arch/arm/boot/dts/bcm-nsp.dtsi +@@ -388,7 +388,7 @@ + reg = <0x36000 0x1000>, + <0x3f308 0x8>, + <0x3f410 0xc>; +- reg-names = "srab", "mux_config", "sgmii"; ++ reg-names = "srab", "mux_config", "sgmii_config"; + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.11-0015-ARM-dts-NSP-Add-a-SRAB-compatible-string-for-each-bo.patch b/target/linux/bcm53xx/patches-5.4/034-v5.11-0015-ARM-dts-NSP-Add-a-SRAB-compatible-string-for-each-bo.patch new file mode 100644 index 0000000000..a0be53ac28 --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/034-v5.11-0015-ARM-dts-NSP-Add-a-SRAB-compatible-string-for-each-bo.patch @@ -0,0 +1,77 @@ +From 42791b317db4cda36751f57bada27857849811d3 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli <f.fainelli@gmail.com> +Date: Mon, 9 Nov 2020 17:41:32 -0800 +Subject: [PATCH 15/16] ARM: dts: NSP: Add a SRAB compatible string for each + board + +Provide a valid compatible string for the Ethernet switch node based on +the board including the switch. This allows us to have sane defaults and +silences the following warnings: + + arch/arm/boot/dts/bcm958522er.dt.yaml: + ethernet-switch@36000: compatible: 'oneOf' conditional failed, +one + must be fixed: + ['brcm,bcm5301x-srab'] is too short + 'brcm,bcm5325' was expected + 'brcm,bcm53115' was expected + 'brcm,bcm53125' was expected + 'brcm,bcm53128' was expected + 'brcm,bcm5365' was expected + 'brcm,bcm5395' was expected + 'brcm,bcm5389' was expected + 'brcm,bcm5397' was expected + 'brcm,bcm5398' was expected + 'brcm,bcm11360-srab' was expected + 'brcm,bcm5301x-srab' is not one of ['brcm,bcm53010-srab', + 'brcm,bcm53011-srab', 'brcm,bcm53012-srab', 'brcm,bcm53018-srab', + 'brcm,bcm53019-srab'] + 'brcm,bcm5301x-srab' is not one of ['brcm,bcm11404-srab', + 'brcm,bcm11407-srab', 'brcm,bcm11409-srab', 'brcm,bcm58310-srab', + 'brcm,bcm58311-srab', 'brcm,bcm58313-srab'] + 'brcm,bcm5301x-srab' is not one of ['brcm,bcm58522-srab', + 'brcm,bcm58523-srab', 'brcm,bcm58525-srab', 'brcm,bcm58622-srab', + 'brcm,bcm58623-srab', 'brcm,bcm58625-srab', 'brcm,bcm88312-srab'] + 'brcm,bcm5301x-srab' is not one of ['brcm,bcm3384-switch', + 'brcm,bcm6328-switch', 'brcm,bcm6368-switch'] + From schema: + Documentation/devicetree/bindings/net/dsa/b53.yaml + +Reviewed-by: Vladimir Oltean <olteanv@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm958522er.dts | 4 ++++ + arch/arm/boot/dts/bcm958525er.dts | 4 ++++ + arch/arm/boot/dts/bcm958525xmc.dts | 4 ++++ + 3 files changed, 12 insertions(+) + +--- a/arch/arm/boot/dts/bcm958522er.dts ++++ b/arch/arm/boot/dts/bcm958522er.dts +@@ -174,3 +174,7 @@ + &xhci { + status = "okay"; + }; ++ ++&srab { ++ compatible = "brcm,bcm58522-srab", "brcm,nsp-srab"; ++}; +--- a/arch/arm/boot/dts/bcm958525er.dts ++++ b/arch/arm/boot/dts/bcm958525er.dts +@@ -186,3 +186,7 @@ + &xhci { + status = "okay"; + }; ++ ++&srab { ++ compatible = "brcm,bcm58525-srab", "brcm,nsp-srab"; ++}; +--- a/arch/arm/boot/dts/bcm958525xmc.dts ++++ b/arch/arm/boot/dts/bcm958525xmc.dts +@@ -206,3 +206,7 @@ + &xhci { + status = "okay"; + }; ++ ++&srab { ++ compatible = "brcm,bcm58525-srab", "brcm,nsp-srab"; ++}; diff --git a/target/linux/bcm53xx/patches-5.4/034-v5.11-0016-ARM-dts-NSP-Provide-defaults-ports-container-node.patch b/target/linux/bcm53xx/patches-5.4/034-v5.11-0016-ARM-dts-NSP-Provide-defaults-ports-container-node.patch new file mode 100644 index 0000000000..714e09ed06 --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/034-v5.11-0016-ARM-dts-NSP-Provide-defaults-ports-container-node.patch @@ -0,0 +1,99 @@ +From 51e40c25aa18d926a8eb1c07289d01611b21123a Mon Sep 17 00:00:00 2001 +From: Florian Fainelli <f.fainelli@gmail.com> +Date: Mon, 9 Nov 2020 17:44:33 -0800 +Subject: [PATCH 16/16] ARM: dts: NSP: Provide defaults ports container node + +Provide an empty 'ports' container node with the correct #address-cells +and #size-cells properties. This silences the following warning: + +arch/arm/boot/dts/bcm958522er.dt.yaml: +ethernet-switch@36000: 'oneOf' conditional failed, one must be fixed: + 'ports' is a required property + 'ethernet-ports' is a required property + From schema: +Documentation/devicetree/bindings/net/dsa/b53.yaml + +Reviewed-by: Vladimir Oltean <olteanv@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm-nsp.dtsi | 4 ++++ + arch/arm/boot/dts/bcm958622hr.dts | 3 --- + arch/arm/boot/dts/bcm958623hr.dts | 3 --- + arch/arm/boot/dts/bcm958625hr.dts | 3 --- + arch/arm/boot/dts/bcm958625k.dts | 3 --- + arch/arm/boot/dts/bcm988312hr.dts | 3 --- + 6 files changed, 4 insertions(+), 15 deletions(-) + +--- a/arch/arm/boot/dts/bcm-nsp.dtsi ++++ b/arch/arm/boot/dts/bcm-nsp.dtsi +@@ -418,6 +418,10 @@ + status = "disabled"; + + /* ports are defined in board DTS */ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; + }; + + i2c0: i2c@38000 { +--- a/arch/arm/boot/dts/bcm958622hr.dts ++++ b/arch/arm/boot/dts/bcm958622hr.dts +@@ -172,9 +172,6 @@ + status = "okay"; + + ports { +- #address-cells = <1>; +- #size-cells = <0>; +- + port@0 { + label = "port0"; + reg = <0>; +--- a/arch/arm/boot/dts/bcm958623hr.dts ++++ b/arch/arm/boot/dts/bcm958623hr.dts +@@ -176,9 +176,6 @@ + status = "okay"; + + ports { +- #address-cells = <1>; +- #size-cells = <0>; +- + port@0 { + label = "port0"; + reg = <0>; +--- a/arch/arm/boot/dts/bcm958625hr.dts ++++ b/arch/arm/boot/dts/bcm958625hr.dts +@@ -196,9 +196,6 @@ + status = "okay"; + + ports { +- #address-cells = <1>; +- #size-cells = <0>; +- + port@0 { + label = "port0"; + reg = <0>; +--- a/arch/arm/boot/dts/bcm958625k.dts ++++ b/arch/arm/boot/dts/bcm958625k.dts +@@ -212,9 +212,6 @@ + status = "okay"; + + ports { +- #address-cells = <1>; +- #size-cells = <0>; +- + port@0 { + label = "port0"; + reg = <0>; +--- a/arch/arm/boot/dts/bcm988312hr.dts ++++ b/arch/arm/boot/dts/bcm988312hr.dts +@@ -184,9 +184,6 @@ + status = "okay"; + + ports { +- #address-cells = <1>; +- #size-cells = <0>; +- + port@0 { + label = "port0"; + reg = <0>; diff --git a/target/linux/bcm53xx/patches-5.4/037-v5.15-0001-ARM-dts-NSP-add-device-names-to-compatible.patch b/target/linux/bcm53xx/patches-5.4/037-v5.15-0001-ARM-dts-NSP-add-device-names-to-compatible.patch new file mode 100644 index 0000000000..c994953d4d --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/037-v5.15-0001-ARM-dts-NSP-add-device-names-to-compatible.patch @@ -0,0 +1,97 @@ +From 465078bfdf5271601f098450ae2fc974865c59fd Mon Sep 17 00:00:00 2001 +From: Matthew Hagan <mnhagan88@gmail.com> +Date: Thu, 10 Jun 2021 21:35:10 +0100 +Subject: [PATCH] ARM: dts: NSP: add device names to compatible + +Currently only the SoC type and platform are specified for all NSP +devices. This patch adds the device names. + +Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm958522er.dts | 2 +- + arch/arm/boot/dts/bcm958525er.dts | 2 +- + arch/arm/boot/dts/bcm958525xmc.dts | 2 +- + arch/arm/boot/dts/bcm958622hr.dts | 2 +- + arch/arm/boot/dts/bcm958625hr.dts | 2 +- + arch/arm/boot/dts/bcm958625k.dts | 2 +- + arch/arm/boot/dts/bcm988312hr.dts | 2 +- + 7 files changed, 7 insertions(+), 7 deletions(-) + +--- a/arch/arm/boot/dts/bcm958522er.dts ++++ b/arch/arm/boot/dts/bcm958522er.dts +@@ -37,7 +37,7 @@ + + / { + model = "NorthStar Plus SVK (BCM958522ER)"; +- compatible = "brcm,bcm58522", "brcm,nsp"; ++ compatible = "brcm,bcm958522er", "brcm,bcm58522", "brcm,nsp"; + + chosen { + stdout-path = "serial0:115200n8"; +--- a/arch/arm/boot/dts/bcm958525er.dts ++++ b/arch/arm/boot/dts/bcm958525er.dts +@@ -37,7 +37,7 @@ + + / { + model = "NorthStar Plus SVK (BCM958525ER)"; +- compatible = "brcm,bcm58525", "brcm,nsp"; ++ compatible = "brcm,bcm958525er", "brcm,bcm58525", "brcm,nsp"; + + chosen { + stdout-path = "serial0:115200n8"; +--- a/arch/arm/boot/dts/bcm958525xmc.dts ++++ b/arch/arm/boot/dts/bcm958525xmc.dts +@@ -37,7 +37,7 @@ + + / { + model = "NorthStar Plus XMC (BCM958525xmc)"; +- compatible = "brcm,bcm58525", "brcm,nsp"; ++ compatible = "brcm,bcm958525xmc", "brcm,bcm58525", "brcm,nsp"; + + chosen { + stdout-path = "serial0:115200n8"; +--- a/arch/arm/boot/dts/bcm958622hr.dts ++++ b/arch/arm/boot/dts/bcm958622hr.dts +@@ -37,7 +37,7 @@ + + / { + model = "NorthStar Plus SVK (BCM958622HR)"; +- compatible = "brcm,bcm58622", "brcm,nsp"; ++ compatible = "brcm,bcm958622hr", "brcm,bcm58622", "brcm,nsp"; + + chosen { + stdout-path = "serial0:115200n8"; +--- a/arch/arm/boot/dts/bcm958625hr.dts ++++ b/arch/arm/boot/dts/bcm958625hr.dts +@@ -37,7 +37,7 @@ + + / { + model = "NorthStar Plus SVK (BCM958625HR)"; +- compatible = "brcm,bcm58625", "brcm,nsp"; ++ compatible = "brcm,bcm958625hr", "brcm,bcm58625", "brcm,nsp"; + + chosen { + stdout-path = "serial0:115200n8"; +--- a/arch/arm/boot/dts/bcm958625k.dts ++++ b/arch/arm/boot/dts/bcm958625k.dts +@@ -36,7 +36,7 @@ + + / { + model = "NorthStar Plus SVK (BCM958625K)"; +- compatible = "brcm,bcm58625", "brcm,nsp"; ++ compatible = "brcm,bcm958625k", "brcm,bcm58625", "brcm,nsp"; + + chosen { + stdout-path = "serial0:115200n8"; +--- a/arch/arm/boot/dts/bcm988312hr.dts ++++ b/arch/arm/boot/dts/bcm988312hr.dts +@@ -37,7 +37,7 @@ + + / { + model = "NorthStar Plus SVK (BCM988312HR)"; +- compatible = "brcm,bcm88312", "brcm,nsp"; ++ compatible = "brcm,bcm988312hr", "brcm,bcm88312", "brcm,nsp"; + + chosen { + stdout-path = "serial0:115200n8"; diff --git a/target/linux/bcm53xx/patches-5.4/037-v5.15-0002-ARM-dts-NSP-enable-DMA-on-bcm988312hr.patch b/target/linux/bcm53xx/patches-5.4/037-v5.15-0002-ARM-dts-NSP-enable-DMA-on-bcm988312hr.patch new file mode 100644 index 0000000000..d84124d2dd --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/037-v5.15-0002-ARM-dts-NSP-enable-DMA-on-bcm988312hr.patch @@ -0,0 +1,29 @@ +From 1b90dde4278a7b459979706b572785bc3a10bbb5 Mon Sep 17 00:00:00 2001 +From: Matthew Hagan <mnhagan88@gmail.com> +Date: Thu, 10 Jun 2021 21:35:12 +0100 +Subject: [PATCH] ARM: dts: NSP: enable DMA on bcm988312hr + +The previous patch "ARM: dts: NSP: Disable PL330 by default, add +dma-coherent property" set the DMAC to disabled by default, requiring it +to be manually enabled on each device. The bcm988312hr was mistakenly +omitted. This patch adds it back. + +Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm988312hr.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/arm/boot/dts/bcm988312hr.dts ++++ b/arch/arm/boot/dts/bcm988312hr.dts +@@ -58,6 +58,10 @@ + + /* USB 3 support needed to be complete */ + ++&dma { ++ status = "okay"; ++}; ++ + &amac0 { + status = "okay"; + }; diff --git a/target/linux/bcm53xx/patches-5.4/037-v5.15-0003-ARM-dts-NSP-disable-qspi-node-by-default.patch b/target/linux/bcm53xx/patches-5.4/037-v5.15-0003-ARM-dts-NSP-disable-qspi-node-by-default.patch new file mode 100644 index 0000000000..df49700829 --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/037-v5.15-0003-ARM-dts-NSP-disable-qspi-node-by-default.patch @@ -0,0 +1,113 @@ +From 091a12b1814142eac16a115dab206f735b5476a9 Mon Sep 17 00:00:00 2001 +From: Matthew Hagan <mnhagan88@gmail.com> +Date: Sun, 13 Jun 2021 10:46:34 +0100 +Subject: [PATCH] ARM: dts: NSP: disable qspi node by default + +The QSPI bus is enabled by default, however this may not used on all +devices. This patch disables by default, requiring it to be explicitly +enabled where required. + +Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm-nsp.dtsi | 1 + + arch/arm/boot/dts/bcm958522er.dts | 1 + + arch/arm/boot/dts/bcm958525er.dts | 1 + + arch/arm/boot/dts/bcm958525xmc.dts | 1 + + arch/arm/boot/dts/bcm958622hr.dts | 1 + + arch/arm/boot/dts/bcm958623hr.dts | 1 + + arch/arm/boot/dts/bcm958625hr.dts | 1 + + arch/arm/boot/dts/bcm958625k.dts | 1 + + arch/arm/boot/dts/bcm988312hr.dts | 1 + + 9 files changed, 9 insertions(+) + +--- a/arch/arm/boot/dts/bcm-nsp.dtsi ++++ b/arch/arm/boot/dts/bcm-nsp.dtsi +@@ -308,6 +308,7 @@ + num-cs = <2>; + #address-cells = <1>; + #size-cells = <0>; ++ status = "disabled"; + }; + + xhci: usb@29000 { +--- a/arch/arm/boot/dts/bcm958522er.dts ++++ b/arch/arm/boot/dts/bcm958522er.dts +@@ -130,6 +130,7 @@ + }; + + &qspi { ++ status = "okay"; + bspi-sel = <0>; + flash: m25p80@0 { + #address-cells = <1>; +--- a/arch/arm/boot/dts/bcm958525er.dts ++++ b/arch/arm/boot/dts/bcm958525er.dts +@@ -130,6 +130,7 @@ + }; + + &qspi { ++ status = "okay"; + bspi-sel = <0>; + flash: m25p80@0 { + #address-cells = <1>; +--- a/arch/arm/boot/dts/bcm958525xmc.dts ++++ b/arch/arm/boot/dts/bcm958525xmc.dts +@@ -146,6 +146,7 @@ + }; + + &qspi { ++ status = "okay"; + bspi-sel = <0>; + flash: m25p80@0 { + #address-cells = <1>; +--- a/arch/arm/boot/dts/bcm958622hr.dts ++++ b/arch/arm/boot/dts/bcm958622hr.dts +@@ -134,6 +134,7 @@ + }; + + &qspi { ++ status = "okay"; + bspi-sel = <0>; + flash: m25p80@0 { + #address-cells = <1>; +--- a/arch/arm/boot/dts/bcm958623hr.dts ++++ b/arch/arm/boot/dts/bcm958623hr.dts +@@ -138,6 +138,7 @@ + }; + + &qspi { ++ status = "okay"; + bspi-sel = <0>; + flash: m25p80@0 { + #address-cells = <1>; +--- a/arch/arm/boot/dts/bcm958625hr.dts ++++ b/arch/arm/boot/dts/bcm958625hr.dts +@@ -150,6 +150,7 @@ + }; + + &qspi { ++ status = "okay"; + bspi-sel = <0>; + flash: m25p80@0 { + #address-cells = <1>; +--- a/arch/arm/boot/dts/bcm958625k.dts ++++ b/arch/arm/boot/dts/bcm958625k.dts +@@ -149,6 +149,7 @@ + }; + + &qspi { ++ status = "okay"; + bspi-sel = <0>; + flash: m25p80@0 { + #address-cells = <1>; +--- a/arch/arm/boot/dts/bcm988312hr.dts ++++ b/arch/arm/boot/dts/bcm988312hr.dts +@@ -138,6 +138,7 @@ + }; + + &qspi { ++ status = "okay"; + bspi-sel = <0>; + flash: m25p80@0 { + #address-cells = <1>; diff --git a/target/linux/bcm53xx/patches-5.4/037-v5.15-0004-ARM-dts-NSP-add-MDIO-bus-controller-node.patch b/target/linux/bcm53xx/patches-5.4/037-v5.15-0004-ARM-dts-NSP-add-MDIO-bus-controller-node.patch new file mode 100644 index 0000000000..35f6e801a1 --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/037-v5.15-0004-ARM-dts-NSP-add-MDIO-bus-controller-node.patch @@ -0,0 +1,30 @@ +From 236b31b1d84eb0e4f10c5f113a2675529456f919 Mon Sep 17 00:00:00 2001 +From: Matthew Hagan <mnhagan88@gmail.com> +Date: Sun, 13 Jun 2021 10:46:36 +0100 +Subject: [PATCH] ARM: dts: NSP: add MDIO bus controller node + +This patch adds the node for the MDIO bus controller, present on the NSP +SoC. + +Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm-nsp.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/arch/arm/boot/dts/bcm-nsp.dtsi ++++ b/arch/arm/boot/dts/bcm-nsp.dtsi +@@ -361,6 +361,13 @@ + status = "disabled"; + }; + ++ mdio: mdio@32000 { ++ compatible = "brcm,iproc-mdio"; ++ reg = <0x32000 0x8>; ++ #size-cells = <0>; ++ #address-cells = <1>; ++ }; ++ + rng: rng@33000 { + compatible = "brcm,bcm-nsp-rng"; + reg = <0x33000 0x14>; diff --git a/target/linux/bcm53xx/patches-5.4/037-v5.15-0005-ARM-dts-NSP-Move-USB3-PHY-to-internal-MDIO-bus.patch b/target/linux/bcm53xx/patches-5.4/037-v5.15-0005-ARM-dts-NSP-Move-USB3-PHY-to-internal-MDIO-bus.patch new file mode 100644 index 0000000000..9b62cb3028 --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/037-v5.15-0005-ARM-dts-NSP-Move-USB3-PHY-to-internal-MDIO-bus.patch @@ -0,0 +1,85 @@ +From 1c615401bddb1be21e1d375aaa071680f40f1ae2 Mon Sep 17 00:00:00 2001 +From: Matthew Hagan <mnhagan88@gmail.com> +Date: Sun, 13 Jun 2021 10:46:37 +0100 +Subject: [PATCH] ARM: dts: NSP: Move USB3 PHY to internal MDIO bus + +This patch largely replicates Vivek Unune's patch "ARM: dts: +BCM5301X:Make usb3 phy use mdio phy driver"[1] for the NSP platform, +whereby we need to create an mdio-mux to facilitate switches +configured via external MDIO, in this case on the Meraki MX65. + +However in doing so, we are creating an overlap with usb3_phy's +ccb-mii range. To resolve this, usb3_phy should be moved to a child +node of the internal MDIO bus. The result is heavily based upon Vivek's +patch. This has also been cross-referenced with Yendapally Reddy's +earlier work which utilised the subsequently dropped brcm,nsp-usb3-phy +driver: "[PATCH v2 4/4] arm: dts: nsp: Add USB nodes to device tree" +[2]. Finally, this change provides conformance to the bcm-ns-usb3-phy +documentation, utilising the required usb3-dmp-syscon property. Note +that support for the deprecated ccb-mii bindings has been dropped as of +"phy: phy-bcm-ns-usb3: drop support for deprecated DT binding"[3]. + +[1] https://lore.kernel.org/patchwork/patch/933971/ +[2] https://www.spinics.net/lists/arm-kernel/msg555132.html +[3] https://lore.kernel.org/linux-devicetree/20201113113423.9466-1-zajec5@gmail.com/ + +Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm-nsp.dtsi | 38 +++++++++++++++++++++++++++------- + 1 file changed, 31 insertions(+), 7 deletions(-) + +--- a/arch/arm/boot/dts/bcm-nsp.dtsi ++++ b/arch/arm/boot/dts/bcm-nsp.dtsi +@@ -368,6 +368,35 @@ + #address-cells = <1>; + }; + ++ mdio-mux@32000 { ++ compatible = "mdio-mux-mmioreg"; ++ reg = <0x32000 0x4>; ++ mux-mask = <0x200>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ mdio-parent-bus = <&mdio>; ++ ++ mdio_int: mdio@0 { ++ reg = <0x0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ usb3_phy: usb3-phy@10 { ++ compatible = "brcm,ns-bx-usb3-phy"; ++ reg = <0x10>; ++ usb3-dmp-syscon = <&usb3_dmp>; ++ #phy-cells = <0>; ++ status = "disabled"; ++ }; ++ }; ++ ++ mdio_ext: mdio@200 { ++ reg = <0x200>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ }; ++ + rng: rng@33000 { + compatible = "brcm,bcm-nsp-rng"; + reg = <0x33000 0x14>; +@@ -526,13 +555,8 @@ + }; + }; + +- usb3_phy: usb3-phy@104000 { +- compatible = "brcm,ns-bx-usb3-phy"; +- reg = <0x104000 0x1000>, +- <0x032000 0x1000>; +- reg-names = "dmp", "ccb-mii"; +- #phy-cells = <0>; +- status = "disabled"; ++ usb3_dmp: syscon@104000 { ++ reg = <0x104000 0x1000>; + }; + }; + diff --git a/target/linux/bcm53xx/patches-5.4/037-v5.15-0006-ARM-dts-NSP-Add-common-bindings-for-MX64-MX65.patch b/target/linux/bcm53xx/patches-5.4/037-v5.15-0006-ARM-dts-NSP-Add-common-bindings-for-MX64-MX65.patch new file mode 100644 index 0000000000..aebf62af9b --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/037-v5.15-0006-ARM-dts-NSP-Add-common-bindings-for-MX64-MX65.patch @@ -0,0 +1,148 @@ +From f111016a8293b968f05450fec83020c94d0f88c2 Mon Sep 17 00:00:00 2001 +From: Matthew Hagan <mnhagan88@gmail.com> +Date: Fri, 6 Aug 2021 21:44:32 +0100 +Subject: [PATCH] ARM: dts: NSP: Add common bindings for MX64/MX65 + +These bindings are required for all Meraki MX64/MX65 devices. These +common bindings include memory (2GB), PWM LEDs, AMAC, I2C (AT24), NAND +partitions, EHCI, OHCI and pinctrl. + +Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + .../dts/bcm958625-meraki-mx6x-common.dtsi | 129 ++++++++++++++++++ + 1 file changed, 129 insertions(+) + create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx6x-common.dtsi + +--- /dev/null ++++ b/arch/arm/boot/dts/bcm958625-meraki-mx6x-common.dtsi +@@ -0,0 +1,129 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++/* ++ * Common Bindings for Cisco Meraki MX64 (Kingpin) and MX65 (Alamo) devices. ++ * ++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com> ++ */ ++ ++#include "bcm-nsp.dtsi" ++#include <dt-bindings/gpio/gpio.h> ++#include <dt-bindings/input/input.h> ++#include <dt-bindings/leds/common.h> ++ ++/ { ++ pwm-leds { ++ compatible = "pwm-leds"; ++ ++ led-1 { ++ function = LED_FUNCTION_INDICATOR; ++ color = <LED_COLOR_ID_RED>; ++ pwms = <&pwm 1 50000>; ++ max-brightness = <255>; ++ }; ++ ++ led-2 { ++ function = LED_FUNCTION_INDICATOR; ++ color = <LED_COLOR_ID_GREEN>; ++ pwms = <&pwm 2 50000>; ++ max-brightness = <255>; ++ }; ++ ++ led-3 { ++ function = LED_FUNCTION_INDICATOR; ++ color = <LED_COLOR_ID_BLUE>; ++ pwms = <&pwm 3 50000>; ++ max-brightness = <255>; ++ }; ++ }; ++}; ++ ++&amac2 { ++ status = "okay"; ++}; ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ at24@50 { ++ compatible = "atmel,24c64"; ++ reg = <0x50>; ++ pagesize = <32>; ++ read-only; ++ }; ++}; ++ ++&nand_controller { ++ nand@0 { ++ compatible = "brcm,nandcs"; ++ reg = <0>; ++ nand-on-flash-bbt; ++ ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ nand-ecc-strength = <24>; ++ nand-ecc-step-size = <1024>; ++ ++ brcm,nand-oob-sector-size = <27>; ++ ++ partition@0 { ++ label = "u-boot"; ++ reg = <0x0 0x80000>; ++ read-only; ++ }; ++ ++ partition@80000 { ++ label = "shmoo"; ++ reg = <0x80000 0x80000>; ++ read-only; ++ }; ++ ++ partition@100000 { ++ label = "bootkernel1"; ++ reg = <0x100000 0x300000>; ++ }; ++ ++ partition@400000 { ++ label = "nvram"; ++ reg = <0x400000 0x100000>; ++ }; ++ ++ partition@500000 { ++ label = "bootkernel2"; ++ reg = <0x500000 0x300000>; ++ }; ++ ++ partition@800000 { ++ label = "ubi"; ++ reg = <0x800000 0x3f700000>; ++ }; ++ }; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&pinctrl { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm_leds>; ++ ++ pwm_leds: pwm_leds { ++ function = "pwm"; ++ groups = "pwm1_grp", "pwm2_grp", "pwm3_grp"; ++ }; ++}; ++ ++&pwm { ++ status = "okay"; ++ #pwm-cells = <2>; ++}; ++ ++&uart0 { ++ clock-frequency = <62500000>; ++ status = "okay"; ++}; diff --git a/target/linux/bcm53xx/patches-5.4/037-v5.15-0007-ARM-dts-NSP-Add-Ax-stepping-modifications.patch b/target/linux/bcm53xx/patches-5.4/037-v5.15-0007-ARM-dts-NSP-Add-Ax-stepping-modifications.patch new file mode 100644 index 0000000000..39a69bd9a8 --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/037-v5.15-0007-ARM-dts-NSP-Add-Ax-stepping-modifications.patch @@ -0,0 +1,90 @@ +From 2addf9266a1d0f4ba59c9868b3effcd50de441a4 Mon Sep 17 00:00:00 2001 +From: Matthew Hagan <mnhagan88@gmail.com> +Date: Fri, 6 Aug 2021 21:44:33 +0100 +Subject: [PATCH] ARM: dts: NSP: Add Ax stepping modifications + +While uncommon, some Ax NSP SoCs exist in the wild. This stepping +requires a modified secondary CPU boot-reg and removal of DMA coherency +properties. Without these modifications, the secondary CPU will be +inactive and many peripherals will exhibit undefined behaviour. + +Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/bcm-nsp-ax.dtsi | 70 +++++++++++++++++++++++++++++++ + 1 file changed, 70 insertions(+) + create mode 100644 arch/arm/boot/dts/bcm-nsp-ax.dtsi + +--- /dev/null ++++ b/arch/arm/boot/dts/bcm-nsp-ax.dtsi +@@ -0,0 +1,70 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++/* ++ * Broadcom Northstar Plus Ax stepping-specific bindings. ++ * Notable differences from B0+ are the secondary-boot-reg and ++ * lack of DMA coherency. ++ */ ++ ++&cpu1 { ++ secondary-boot-reg = <0xffff042c>; ++}; ++ ++&dma { ++ /delete-property/ dma-coherent; ++}; ++ ++&sdio { ++ /delete-property/ dma-coherent; ++}; ++ ++&amac0 { ++ /delete-property/ dma-coherent; ++}; ++ ++&amac1 { ++ /delete-property/ dma-coherent; ++}; ++ ++&amac2 { ++ /delete-property/ dma-coherent; ++}; ++ ++&ehci0 { ++ /delete-property/ dma-coherent; ++}; ++ ++&mailbox { ++ /delete-property/ dma-coherent; ++}; ++ ++&xhci { ++ /delete-property/ dma-coherent; ++}; ++ ++&ehci0 { ++ /delete-property/ dma-coherent; ++}; ++ ++&ohci0 { ++ /delete-property/ dma-coherent; ++}; ++ ++&i2c0 { ++ /delete-property/ dma-coherent; ++}; ++ ++&sata { ++ /delete-property/ dma-coherent; ++}; ++ ++&pcie0 { ++ /delete-property/ dma-coherent; ++}; ++ ++&pcie1 { ++ /delete-property/ dma-coherent; ++}; ++ ++&pcie2 { ++ /delete-property/ dma-coherent; ++}; diff --git a/target/linux/bcm53xx/patches-5.4/037-v5.15-0008-ARM-dts-NSP-Add-DT-files-for-Meraki-MX64-series.patch b/target/linux/bcm53xx/patches-5.4/037-v5.15-0008-ARM-dts-NSP-Add-DT-files-for-Meraki-MX64-series.patch new file mode 100644 index 0000000000..1960f90c68 --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/037-v5.15-0008-ARM-dts-NSP-Add-DT-files-for-Meraki-MX64-series.patch @@ -0,0 +1,340 @@ +From 3f902645280baf0d7dab57c227cc14f43edb45ef Mon Sep 17 00:00:00 2001 +From: Matthew Hagan <mnhagan88@gmail.com> +Date: Fri, 6 Aug 2021 21:44:34 +0100 +Subject: [PATCH] ARM: dts: NSP: Add DT files for Meraki MX64 series + +MX64 & MX64W Hardware info: + - CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz + - RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR) + - Storage: 1 GB (Micron MT29F8G08ABACA) + - Networking: BCM58625 internal switch (5x 1GbE ports) + - USB: 1x USB2.0 + - Serial: Internal header + - WLAN(MX64W only): 2x Broadcom BCM43520KMLG on the PCI bus + +This patch adds the Meraki MX64 series-specific bindings. Since some +devices make use of the older A0 SoC, changes need to be made to +accommodate this case, including removal of coherency options and +modification to the secondary-boot-reg. + +Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/Makefile | 4 + + .../boot/dts/bcm958625-meraki-kingpin.dtsi | 163 ++++++++++++++++++ + .../arm/boot/dts/bcm958625-meraki-mx64-a0.dts | 25 +++ + arch/arm/boot/dts/bcm958625-meraki-mx64.dts | 24 +++ + .../boot/dts/bcm958625-meraki-mx64w-a0.dts | 33 ++++ + arch/arm/boot/dts/bcm958625-meraki-mx64w.dts | 32 ++++ + 6 files changed, 281 insertions(+) + create mode 100644 arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi + create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dts + create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64.dts + create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dts + create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64w.dts + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -148,6 +148,10 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \ + bcm958525xmc.dtb \ + bcm958622hr.dtb \ + bcm958623hr.dtb \ ++ bcm958625-meraki-mx64.dtb \ ++ bcm958625-meraki-mx64-a0.dtb \ ++ bcm958625-meraki-mx64w.dtb \ ++ bcm958625-meraki-mx64w-a0.dtb \ + bcm958625hr.dtb \ + bcm988312hr.dtb \ + bcm958625k.dtb +--- /dev/null ++++ b/arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi +@@ -0,0 +1,163 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++/* ++ * Device Tree Bindings for Cisco Meraki MX64 series (Kingpin). ++ * ++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com> ++ */ ++ ++#include "bcm958625-meraki-mx6x-common.dtsi" ++ ++/ { ++ ++ keys { ++ compatible = "gpio-keys-polled"; ++ autorepeat; ++ poll-interval = <20>; ++ ++ reset { ++ label = "reset"; ++ linux,code = <KEY_RESTART>; ++ gpios = <&gpioa 6 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-0 { ++ /* green:lan1-left */ ++ function = LED_FUNCTION_ACTIVITY; ++ function-enumerator = <0>; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&gpioa 19 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-1 { ++ /* green:lan1-right */ ++ function = LED_FUNCTION_ACTIVITY; ++ function-enumerator = <1>; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&gpioa 18 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-2 { ++ /* green:lan2-left */ ++ function = LED_FUNCTION_ACTIVITY; ++ function-enumerator = <2>; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&gpioa 24 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-3 { ++ /* green:lan2-right */ ++ function = LED_FUNCTION_ACTIVITY; ++ function-enumerator = <3>; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&gpioa 20 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-4 { ++ /* green:lan3-left */ ++ function = LED_FUNCTION_ACTIVITY; ++ function-enumerator = <4>; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&gpioa 26 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-5 { ++ /* green:lan3-right */ ++ function = LED_FUNCTION_ACTIVITY; ++ function-enumerator = <5>; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&gpioa 25 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-6 { ++ /* green:lan4-left */ ++ function = LED_FUNCTION_ACTIVITY; ++ function-enumerator = <6>; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&gpioa 28 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-7 { ++ /* green:lan4-right */ ++ function = LED_FUNCTION_ACTIVITY; ++ function-enumerator = <7>; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&gpioa 27 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-8 { ++ /* green:wan-left */ ++ function = LED_FUNCTION_ACTIVITY; ++ function-enumerator = <8>; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&gpioa 30 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-9 { ++ /* green:wan-right */ ++ function = LED_FUNCTION_ACTIVITY; ++ function-enumerator = <9>; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&gpioa 29 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-a { ++ /* amber:power */ ++ function = LED_FUNCTION_POWER; ++ color = <LED_COLOR_ID_AMBER>; ++ gpios = <&gpioa 0 GPIO_ACTIVE_LOW>; ++ default-state = "on"; ++ }; ++ ++ led-b { ++ /* white:status */ ++ function = LED_FUNCTION_STATUS; ++ color = <LED_COLOR_ID_WHITE>; ++ gpios = <&gpioa 31 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++}; ++ ++&srab { ++ compatible = "brcm,bcm58625-srab", "brcm,nsp-srab"; ++ status = "okay"; ++ ++ ports { ++ port@0 { ++ label = "lan1"; ++ reg = <0>; ++ }; ++ ++ port@1 { ++ label = "lan2"; ++ reg = <1>; ++ }; ++ ++ port@2 { ++ label = "lan3"; ++ reg = <2>; ++ }; ++ ++ port@3 { ++ label = "lan4"; ++ reg = <3>; ++ }; ++ ++ port@4 { ++ label = "wan"; ++ reg = <4>; ++ }; ++ ++ port@8 { ++ ethernet = <&amac2>; ++ reg = <8>; ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dts +@@ -0,0 +1,25 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++/* ++ * Device Tree Bindings for Cisco Meraki MX64 with A0 SoC. ++ * ++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com> ++ */ ++ ++/dts-v1/; ++ ++#include "bcm958625-meraki-kingpin.dtsi" ++#include "bcm-nsp-ax.dtsi" ++ ++/ { ++ model = "Cisco Meraki MX64(A0)"; ++ compatible = "meraki,mx64-a0", "brcm,bcm58625", "brcm,nsp"; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@60000000 { ++ device_type = "memory"; ++ reg = <0x60000000 0x80000000>; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm958625-meraki-mx64.dts +@@ -0,0 +1,24 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++/* ++ * Device Tree Bindings for Cisco Meraki MX64 with B0+ SoC. ++ * ++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com> ++ */ ++ ++/dts-v1/; ++ ++#include "bcm958625-meraki-kingpin.dtsi" ++ ++/ { ++ model = "Cisco Meraki MX64"; ++ compatible = "meraki,mx64", "brcm,bcm58625", "brcm,nsp"; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@60000000 { ++ device_type = "memory"; ++ reg = <0x60000000 0x80000000>; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dts +@@ -0,0 +1,33 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++/* ++ * Device Tree Bindings for Cisco Meraki MX64W with A0 SoC. ++ * ++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com> ++ */ ++ ++/dts-v1/; ++ ++#include "bcm958625-meraki-kingpin.dtsi" ++#include "bcm-nsp-ax.dtsi" ++ ++/ { ++ model = "Cisco Meraki MX64W(A0)"; ++ compatible = "meraki,mx64w-a0", "brcm,bcm58625", "brcm,nsp"; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@60000000 { ++ device_type = "memory"; ++ reg = <0x60000000 0x80000000>; ++ }; ++}; ++ ++&pcie0 { ++ status = "okay"; ++}; ++ ++&pcie1 { ++ status = "okay"; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm958625-meraki-mx64w.dts +@@ -0,0 +1,32 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++/* ++ * Device Tree Bindings for Cisco Meraki MX64W with B0+ SoC. ++ * ++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com> ++ */ ++ ++/dts-v1/; ++ ++#include "bcm958625-meraki-kingpin.dtsi" ++ ++/ { ++ model = "Cisco Meraki MX64W"; ++ compatible = "meraki,mx64w", "brcm,bcm58625", "brcm,nsp"; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@60000000 { ++ device_type = "memory"; ++ reg = <0x60000000 0x80000000>; ++ }; ++}; ++ ++&pcie0 { ++ status = "okay"; ++}; ++ ++&pcie1 { ++ status = "okay"; ++}; diff --git a/target/linux/bcm53xx/patches-5.4/037-v5.15-0009-ARM-dts-NSP-Add-DT-files-for-Meraki-MX65-series.patch b/target/linux/bcm53xx/patches-5.4/037-v5.15-0009-ARM-dts-NSP-Add-DT-files-for-Meraki-MX65-series.patch new file mode 100644 index 0000000000..aa431b97cc --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/037-v5.15-0009-ARM-dts-NSP-Add-DT-files-for-Meraki-MX65-series.patch @@ -0,0 +1,386 @@ +From 702a8f4744ed5b480f2b2411858184afdb10f9fd Mon Sep 17 00:00:00 2001 +From: Matthew Hagan <mnhagan88@gmail.com> +Date: Fri, 6 Aug 2021 21:44:35 +0100 +Subject: [PATCH] ARM: dts: NSP: Add DT files for Meraki MX65 series + +MX65 & MX65W Hardware info: + - CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz + - RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR) + - Storage: 1 GB (Micron MT29F8G08ABACA) + - Networking: BCM58625 switch (2x 1GbE ports) + 2x Qualcomm QCA8337 switches (10x 1GbE ports total) + - PSE: Broadcom BCM59111KMLG connected to LAN ports 11 & 12 + - USB: 1x USB2.0 + - Serial: Internal header + - WLAN(MX65W Only): 2x Broadcom BCM43520KMLG on the PCI bus. + +Note that a driver and firmware image for the BCM59111 PSE has been +released under GPL, but this is not present in the kernel. + +Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +--- + arch/arm/boot/dts/Makefile | 2 + + arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi | 279 ++++++++++++++++++ + arch/arm/boot/dts/bcm958625-meraki-mx65.dts | 24 ++ + arch/arm/boot/dts/bcm958625-meraki-mx65w.dts | 32 ++ + 4 files changed, 337 insertions(+) + create mode 100644 arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi + create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx65.dts + create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx65w.dts + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -152,6 +152,8 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \ + bcm958625-meraki-mx64-a0.dtb \ + bcm958625-meraki-mx64w.dtb \ + bcm958625-meraki-mx64w-a0.dtb \ ++ bcm958625-meraki-mx65.dtb \ ++ bcm958625-meraki-mx65w.dtb \ + bcm958625hr.dtb \ + bcm988312hr.dtb \ + bcm958625k.dtb +--- /dev/null ++++ b/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi +@@ -0,0 +1,279 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++/* ++ * Device Tree Bindings for Cisco Meraki MX65 series (Alamo). ++ * ++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com> ++ */ ++ ++#include "bcm958625-meraki-mx6x-common.dtsi" ++ ++/ { ++ keys { ++ compatible = "gpio-keys-polled"; ++ autorepeat; ++ poll-interval = <20>; ++ ++ reset { ++ label = "reset"; ++ linux,code = <KEY_RESTART>; ++ gpios = <&gpioa 8 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-0 { ++ /* green:wan1-left */ ++ function = LED_FUNCTION_ACTIVITY; ++ function-enumerator = <0>; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&gpioa 25 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-1 { ++ /* green:wan1-right */ ++ function = LED_FUNCTION_ACTIVITY; ++ function-enumerator = <1>; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&gpioa 24 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-2 { ++ /* green:wan2-left */ ++ function = LED_FUNCTION_ACTIVITY; ++ function-enumerator = <2>; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&gpioa 27 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-3 { ++ /* green:wan2-right */ ++ function = LED_FUNCTION_ACTIVITY; ++ function-enumerator = <3>; ++ color = <LED_COLOR_ID_GREEN>; ++ gpios = <&gpioa 26 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-4 { ++ /* amber:power */ ++ function = LED_FUNCTION_POWER; ++ color = <LED_COLOR_ID_AMBER>; ++ gpios = <&gpioa 3 GPIO_ACTIVE_HIGH>; ++ default-state = "on"; ++ }; ++ ++ led-5 { ++ /* white:status */ ++ function = LED_FUNCTION_STATUS; ++ color = <LED_COLOR_ID_WHITE>; ++ gpios = <&gpioa 31 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++ ++ mdio-mii-mux { ++ compatible = "mdio-mux-mmioreg"; ++ reg = <0x1803f1c0 0x4>; ++ mux-mask = <0x2000>; ++ mdio-parent-bus = <&mdio_ext>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mdio@0 { ++ reg = <0x0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ phy_port6: phy@0 { ++ reg = <0>; ++ }; ++ ++ phy_port7: phy@1 { ++ reg = <1>; ++ }; ++ ++ phy_port8: phy@2 { ++ reg = <2>; ++ }; ++ ++ phy_port9: phy@3 { ++ reg = <3>; ++ }; ++ ++ phy_port10: phy@4 { ++ reg = <4>; ++ }; ++ ++ switch@10 { ++ compatible = "qca,qca8337"; ++ reg = <0x10>; ++ dsa,member = <1 0>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ port@0 { ++ reg = <0>; ++ ethernet = <&sgmii1>; ++ phy-mode = "sgmii"; ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ label = "lan8"; ++ phy-handle = <&phy_port6>; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ label = "lan9"; ++ phy-handle = <&phy_port7>; ++ }; ++ ++ port@3 { ++ reg = <3>; ++ label = "lan10"; ++ phy-handle = <&phy_port8>; ++ }; ++ ++ port@4 { ++ reg = <4>; ++ label = "lan11"; ++ phy-handle = <&phy_port9>; ++ }; ++ ++ port@5 { ++ reg = <5>; ++ label = "lan12"; ++ phy-handle = <&phy_port10>; ++ }; ++ }; ++ }; ++ }; ++ ++ mdio-mii@2000 { ++ reg = <0x2000>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ phy_port1: phy@0 { ++ reg = <0>; ++ }; ++ ++ phy_port2: phy@1 { ++ reg = <1>; ++ }; ++ ++ phy_port3: phy@2 { ++ reg = <2>; ++ }; ++ ++ phy_port4: phy@3 { ++ reg = <3>; ++ }; ++ ++ phy_port5: phy@4 { ++ reg = <4>; ++ }; ++ ++ switch@10 { ++ compatible = "qca,qca8337"; ++ reg = <0x10>; ++ dsa,member = <2 0>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ port@0 { ++ reg = <0>; ++ ethernet = <&sgmii0>; ++ phy-mode = "sgmii"; ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ label = "lan3"; ++ phy-handle = <&phy_port1>; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ label = "lan4"; ++ phy-handle = <&phy_port2>; ++ }; ++ ++ port@3 { ++ reg = <3>; ++ label = "lan5"; ++ phy-handle = <&phy_port3>; ++ }; ++ ++ port@4 { ++ reg = <4>; ++ label = "lan6"; ++ phy-handle = <&phy_port4>; ++ }; ++ ++ port@5 { ++ reg = <5>; ++ label = "lan7"; ++ phy-handle = <&phy_port5>; ++ }; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&srab { ++ compatible = "brcm,bcm58625-srab", "brcm,nsp-srab"; ++ status = "okay"; ++ dsa,member = <0 0>; ++ ++ ports { ++ port@0 { ++ label = "wan1"; ++ reg = <0>; ++ }; ++ ++ port@1 { ++ label = "wan2"; ++ reg = <1>; ++ }; ++ ++ sgmii0: port@4 { ++ label = "sw0"; ++ reg = <4>; ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ }; ++ ++ sgmii1: port@5 { ++ label = "sw1"; ++ reg = <5>; ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ }; ++ ++ port@8 { ++ ethernet = <&amac2>; ++ reg = <8>; ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm958625-meraki-mx65.dts +@@ -0,0 +1,24 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++/* ++ * Device Tree Bindings for Cisco Meraki MX65. ++ * ++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com> ++ */ ++ ++/dts-v1/; ++ ++#include "bcm958625-meraki-alamo.dtsi" ++ ++/ { ++ model = "Cisco Meraki MX65"; ++ compatible = "meraki,mx65", "brcm,bcm58625", "brcm,nsp"; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@60000000 { ++ device_type = "memory"; ++ reg = <0x60000000 0x80000000>; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm958625-meraki-mx65w.dts +@@ -0,0 +1,32 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++/* ++ * Device Tree Bindings for Cisco Meraki MX65W. ++ * ++ * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com> ++ */ ++ ++/dts-v1/; ++ ++#include "bcm958625-meraki-alamo.dtsi" ++ ++/ { ++ model = "Cisco Meraki MX65W"; ++ compatible = "meraki,mx65w", "brcm,bcm58625", "brcm,nsp"; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@60000000 { ++ device_type = "memory"; ++ reg = <0x60000000 0x80000000>; ++ }; ++}; ++ ++&pcie0 { ++ status = "okay"; ++}; ++ ++&pcie1 { ++ status = "okay"; ++}; diff --git a/target/linux/bcm53xx/patches-5.4/037-v5.15-0001-ARM-dts-BCM5301X-Fix-nodes-names.patch b/target/linux/bcm53xx/patches-5.4/037-v5.15-0010-ARM-dts-BCM5301X-Fix-nodes-names.patch index e779d45645..e779d45645 100644 --- a/target/linux/bcm53xx/patches-5.4/037-v5.15-0001-ARM-dts-BCM5301X-Fix-nodes-names.patch +++ b/target/linux/bcm53xx/patches-5.4/037-v5.15-0010-ARM-dts-BCM5301X-Fix-nodes-names.patch diff --git a/target/linux/bcm53xx/patches-5.4/037-v5.15-0002-ARM-dts-BCM5301X-Fix-MDIO-mux-binding.patch b/target/linux/bcm53xx/patches-5.4/037-v5.15-0011-ARM-dts-BCM5301X-Fix-MDIO-mux-binding.patch index dc20720dbd..dc20720dbd 100644 --- a/target/linux/bcm53xx/patches-5.4/037-v5.15-0002-ARM-dts-BCM5301X-Fix-MDIO-mux-binding.patch +++ b/target/linux/bcm53xx/patches-5.4/037-v5.15-0011-ARM-dts-BCM5301X-Fix-MDIO-mux-binding.patch diff --git a/target/linux/bcm53xx/patches-5.4/037-v5.15-0003-ARM-dts-BCM5301X-Fix-memory-nodes-names.patch b/target/linux/bcm53xx/patches-5.4/037-v5.15-0012-ARM-dts-BCM5301X-Fix-memory-nodes-names.patch index fda22404a5..fda22404a5 100644 --- a/target/linux/bcm53xx/patches-5.4/037-v5.15-0003-ARM-dts-BCM5301X-Fix-memory-nodes-names.patch +++ b/target/linux/bcm53xx/patches-5.4/037-v5.15-0012-ARM-dts-BCM5301X-Fix-memory-nodes-names.patch |