aboutsummaryrefslogtreecommitdiffstats
path: root/target
diff options
context:
space:
mode:
authorDaniel Golle <daniel@makrotopia.org>2023-03-11 03:56:35 +0000
committerDaniel Golle <daniel@makrotopia.org>2023-05-18 02:41:49 +0100
commit7cbe34170e3d8471c1ebacde33a2372c92433be4 (patch)
tree758e37d3e4620cf72f3df446f44b953d008d7403 /target
parenta67f2ab745093cd37801578c2d4779ce5db69579 (diff)
downloadupstream-7cbe34170e3d8471c1ebacde33a2372c92433be4.tar.gz
upstream-7cbe34170e3d8471c1ebacde33a2372c92433be4.tar.bz2
upstream-7cbe34170e3d8471c1ebacde33a2372c92433be4.zip
mediatek: add support for the GL.iNet GL-MT3000
The MT-3000 is a pocket-sized Wi-Fi 6 router based on MediaTek MT7981. Specification: - SoC: MediaTek MT7981B - CPU: 2x 1.3 GHz Cortex-A53 - Flash: 256 MiB Macronix SPI NAND - RAM: 512 MiB Nanya DDR4 - WLAN: 2.4 GHz, 5 GHz (MediaTek MT7976CN) - Ethernet: - 1x 10/100/1000 Mbps built-in PHY (LAN) - 1x 10/100/1000/2500 Mbps MaxLinear GPY211 PHY (WAN) - USB 3.0 port - Buttons: 1 button, 1 switch - LEDs: 1x light-blue, 1x warm-white - Serial console: internal 4-pin header, 115200 8n1 - PWM controlled fan with tacho - Power: 5 VDC, 3 A (USB Type-C) Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Diffstat (limited to 'target')
-rw-r--r--target/linux/mediatek/base-files/lib/preinit/05_set_preinit_iface8
-rw-r--r--target/linux/mediatek/dts/mt7981b-glinet-gl-mt3000.dts240
-rw-r--r--target/linux/mediatek/filogic/base-files/etc/board.d/02_network3
-rw-r--r--target/linux/mediatek/image/filogic.mk47
4 files changed, 295 insertions, 3 deletions
diff --git a/target/linux/mediatek/base-files/lib/preinit/05_set_preinit_iface b/target/linux/mediatek/base-files/lib/preinit/05_set_preinit_iface
index 3ac856d1c4..5e7fc81ad8 100644
--- a/target/linux/mediatek/base-files/lib/preinit/05_set_preinit_iface
+++ b/target/linux/mediatek/base-files/lib/preinit/05_set_preinit_iface
@@ -1,11 +1,15 @@
set_preinit_iface() {
- ip link set eth0 up
-
case $(board_name) in
+ glinet,gl-mt3000)
+ ip link set eth1 up
+ ifname=eth1
+ ;;
ubnt,unifi-6-lr)
+ ip link set eth0 up
ifname=eth0
;;
*)
+ ip link set eth0 up
ifname=lan1
;;
esac
diff --git a/target/linux/mediatek/dts/mt7981b-glinet-gl-mt3000.dts b/target/linux/mediatek/dts/mt7981b-glinet-gl-mt3000.dts
new file mode 100644
index 0000000000..d916ee49ef
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7981b-glinet-gl-mt3000.dts
@@ -0,0 +1,240 @@
+/dts-v1/;
+
+#include "mt7981.dtsi"
+
+/ {
+ model = "GL.iNet GL-MT3000";
+ compatible = "glinet,gl-mt3000", "mediatek,mt7981";
+
+ aliases {
+ led-boot = &led_lightblue;
+ led-failsafe = &led_lightblue;
+ led-running = &led_white;
+ led-upgrade = &led_lightblue;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+ };
+
+ mode {
+ label = "mode";
+ linux,input-type = <EV_SW>;
+ linux,code = <BTN_0>;
+ gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_lightblue: led@0 {
+ label = "blue:run";
+ gpios = <&pio 31 GPIO_ACTIVE_LOW>;
+ };
+
+ led_white: led@1 {
+ label = "white:system";
+ gpios = <&pio 30 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ fan_5v: regulator-fan-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "fan";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&pio 28 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-boot-on;
+ };
+
+ usb_vbus: regulator-usb-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&pio 12 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-boot-on;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&eth {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mdio_pins>;
+
+ status = "okay";
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "2500base-x";
+ phy-handle = <&phy0>;
+ nvmem-cells = <&macaddr>;
+ nvmem-cell-names = "mac-address";
+ };
+
+ gmac1: mac@1 {
+ compatible = "mediatek,eth-mac";
+ reg = <1>;
+ phy-mode = "gmii";
+ phy-handle = <&int_gbe_phy>;
+ nvmem-cells = <&macaddr>;
+ nvmem-cell-names = "mac-address";
+ mac-address-increment = <1>;
+ };
+};
+
+&mdio_bus {
+ reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <600>;
+ reset-post-delay-us = <20000>;
+
+ phy0: ethernet-phy@5 {
+ reg = <5>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ phy-mode = "2500base-x";
+ };
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pins>;
+
+ status = "okay";
+};
+
+&fan {
+ pwms = <&pwm 0 40000 0>;
+ fan-supply = <&fan_5v>;
+ interrupt-parent = <&pio>;
+ interrupts = <29 IRQ_TYPE_EDGE_RISING>;
+ status = "okay";
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_flash_pins>;
+ status = "okay";
+
+ spi_nand: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <52000000>;
+
+ spi-cal-enable;
+ spi-cal-mode = "read-data";
+ spi-cal-datalen = <7>;
+ spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
+ spi-cal-addrlen = <5>;
+ spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
+
+ spi-tx-buswidth = <4>;
+ spi-rx-buswidth = <4>;
+ mediatek,nmbm;
+ mediatek,bmt-max-ratio = <1>;
+ mediatek,bmt-max-reserved-blocks = <64>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "BL2";
+ reg = <0x00000 0x0100000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "u-boot-env";
+ reg = <0x0100000 0x0080000>;
+ };
+
+ factory: partition@180000 {
+ label = "Factory";
+ reg = <0x180000 0x0200000>;
+ read-only;
+
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr: macaddr@a {
+ reg = <0xa 0x6>;
+ };
+ };
+
+ partition@380000 {
+ label = "FIP";
+ reg = <0x380000 0x0200000>;
+ read-only;
+ };
+
+ partition@580000 {
+ label = "log";
+ reg = <0x580000 0x0040000>;
+ };
+
+ partition@5c0000 {
+ label = "ubi";
+ reg = <0x5c0000 0xf640000>;
+ compatible = "linux,ubi";
+ };
+ };
+ };
+};
+
+&pio {
+ spi0_flash_pins: spi0-pins {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+ };
+
+ pwm_pins: pwm0-pins {
+ mux {
+ function = "pwm";
+ groups = "pwm0_1";
+ };
+ };
+};
+
+&usb_phy {
+ status = "okay";
+};
+
+&xhci {
+ vbus-supply = <&usb_vbus>;
+
+ status = "okay";
+};
+
+&wifi {
+ mediatek,mtd-eeprom = <&factory 0x0>;
+
+ status = "okay";
+};
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
index 1bdc8337eb..63f898a9cd 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
@@ -17,6 +17,9 @@ mediatek_setup_interfaces()
cudy,wr3000-v1)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
;;
+ glinet,gl-mt3000)
+ ucidef_set_interfaces_lan_wan eth1 eth0
+ ;;
mediatek,mt7986a-rfb)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan6" "eth1 wan"
;;
diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index 821827e3ca..dcd048046c 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -36,6 +36,36 @@ define Build/mt7986-gpt
rm $@.tmp
endef
+metadata_gl_json = \
+ '{ $(if $(IMAGE_METADATA),$(IMAGE_METADATA)$(comma)) \
+ "metadata_version": "1.1", \
+ "compat_version": "$(call json_quote,$(compat_version))", \
+ $(if $(DEVICE_COMPAT_MESSAGE),"compat_message": "$(call json_quote,$(DEVICE_COMPAT_MESSAGE))"$(comma)) \
+ $(if $(filter-out 1.0,$(compat_version)),"new_supported_devices": \
+ [$(call metadata_devices,$(SUPPORTED_DEVICES))]$(comma) \
+ "supported_devices": ["$(call json_quote,$(legacy_supported_message))"]$(comma)) \
+ $(if $(filter 1.0,$(compat_version)),"supported_devices":[$(call metadata_devices,$(SUPPORTED_DEVICES))]$(comma)) \
+ "version": { \
+ "release": "$(call json_quote,$(VERSION_NUMBER))", \
+ "date": "$(shell TZ='Asia/Chongqing' date '+%Y%m%d%H%M%S')", \
+ "dist": "$(call json_quote,$(VERSION_DIST))", \
+ "version": "$(call json_quote,$(VERSION_NUMBER))", \
+ "revision": "$(call json_quote,$(REVISION))", \
+ "target": "$(call json_quote,$(TARGETID))", \
+ "board": "$(call json_quote,$(if $(BOARD_NAME),$(BOARD_NAME),$(DEVICE_NAME)))" \
+ }, \
+ "upgrade_control":"$(shell python3 $(TOPDIR)/make_gl_metadata.py)", \
+ "release_note":"$(shell sed ':a;N;s/\n/\\n/g;s/\r/\\r/g;ta' $(TOPDIR)/gl_release_note)" \
+ }'
+
+define Build/append-gl-metadata
+ $(if $(SUPPORTED_DEVICES),-echo $(call metadata_gl_json,$(SUPPORTED_DEVICES)) | fwtool -I - $@)
+ [ ! -s "$(BUILD_KEY)" -o ! -s "$@" ] || { \
+ usign -S -m "$@" -s "$(BUILD_KEY)" -x "$@.sig" ;\
+ fwtool -S "$@.sig" "$@" ;\
+ }
+endef
+
define Device/asus_tuf-ax4200
DEVICE_VENDOR := ASUS
DEVICE_MODEL := TUF-AX4200
@@ -52,7 +82,6 @@ define Device/asus_tuf-ax4200
endef
TARGET_DEVICES += asus_tuf-ax4200
-
define Device/bananapi_bpi-r3
DEVICE_VENDOR := Bananapi
DEVICE_MODEL := BPi-R3
@@ -119,6 +148,22 @@ define Device/cudy_wr3000-v1
endef
TARGET_DEVICES += cudy_wr3000-v1
+define Device/glinet_gl-mt3000
+ DEVICE_VENDOR := GL.iNet
+ DEVICE_MODEL := GL-MT3000
+ DEVICE_DTS := mt7981b-glinet-gl-mt3000
+ DEVICE_DTS_DIR := ../dts
+ SUPPORTED_DEVICES += glinet,mt3000-snand
+ DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware kmod-hwmon-pwmfan kmod-usb3
+ UBINIZE_OPTS := -E 5
+ BLOCKSIZE := 128k
+ PAGESIZE := 2048
+ IMAGE_SIZE := 246272k
+ KERNEL_IN_UBI := 1
+ IMAGE/sysupgrade.bin := sysupgrade-tar | append-gl-metadata
+endef
+TARGET_DEVICES += glinet_gl-mt3000
+
define Device/mediatek_mt7986a-rfb-nand
DEVICE_VENDOR := MediaTek
DEVICE_MODEL := MT7986 rfba AP (NAND)