diff options
| author | Mantas Pucka <mantas@8devices.com> | 2020-04-16 09:40:49 +0300 |
|---|---|---|
| committer | Chuanhong Guo <gch981213@gmail.com> | 2020-04-18 11:37:06 +0800 |
| commit | 4745969ad7c0cb65f55c8de1f05eba786ca27f71 (patch) | |
| tree | 54277c61c40b624b47807178ec2cb78dc6c29ba0 /target | |
| parent | 02fcbe2f3d4eaf65e90bb167aa7818eacc08c633 (diff) | |
| download | upstream-4745969ad7c0cb65f55c8de1f05eba786ca27f71.tar.gz upstream-4745969ad7c0cb65f55c8de1f05eba786ca27f71.tar.bz2 upstream-4745969ad7c0cb65f55c8de1f05eba786ca27f71.zip | |
generic: spi-nor: fix 4-byte opcode support for w25q256
There are 2 different chips (w25q256fv and w25q256jv) that share
the same JEDEC ID. Only w25q256jv fully supports 4-byte opcodes.
Use SFDP header version to differentiate between them.
Fixes broken reboot on 8devices Habanero since f0f35fdac
Signed-off-by: Mantas Pucka <mantas@8devices.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/generic/pending-5.4/482-mtd-spi-nor-fix-4-byte-opcode-support-for-w25q256.patch | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/target/linux/generic/pending-5.4/482-mtd-spi-nor-fix-4-byte-opcode-support-for-w25q256.patch b/target/linux/generic/pending-5.4/482-mtd-spi-nor-fix-4-byte-opcode-support-for-w25q256.patch new file mode 100644 index 0000000000..d63aa76319 --- /dev/null +++ b/target/linux/generic/pending-5.4/482-mtd-spi-nor-fix-4-byte-opcode-support-for-w25q256.patch @@ -0,0 +1,60 @@ +From: Mantas Pucka <mantas@8devices.com> +To: linux-mtd@lists.infradead.org +Subject: [PATCH] mtd: spi-nor: fix 4-byte opcode support for w25q256 +Date: Wed, 15 Apr 2020 16:48:30 +0300 +Message-ID: <1586958510-24012-1-git-send-email-mantas@8devices.com> + +There are 2 different chips (w25q256fv and w25q256jv) that share +the same JEDEC ID. Only w25q256jv fully supports 4-byte opcodes. +Use SFDP header version to differentiate between them. + +for OpenWRT only: rebased to linux-v5.4 + +Signed-off-by: Mantas Pucka <mantas@8devices.com> +--- + +--- a/drivers/mtd/spi-nor/spi-nor.c ++++ b/drivers/mtd/spi-nor/spi-nor.c +@@ -2170,6 +2170,32 @@ static struct spi_nor_fixups gd25q256_fi + .default_init = gd25q256_default_init, + }; + ++static int ++w25q256_post_bfpt_fixups(struct spi_nor *nor, ++ const struct sfdp_parameter_header *bfpt_header, ++ const struct sfdp_bfpt *bfpt, ++ struct spi_nor_flash_parameter *params) ++{ ++ /* ++ * W25Q256JV supports 4B opcodes but W25Q256FV does not. ++ * Unfortunately, Winbond has re-used the same JEDEC ID for both ++ * variants which prevents us from defining a new entry in the parts ++ * table. ++ * To differentiate between W25Q256JV and W25Q256FV check SFDP header ++ * version: only JV has JESD216A compliant structure (version 5) ++ */ ++ ++ if (bfpt_header->major == SFDP_JESD216_MAJOR && ++ bfpt_header->minor == SFDP_JESD216A_MINOR) ++ nor->flags |= SNOR_F_4B_OPCODES; ++ ++ return 0; ++} ++ ++static struct spi_nor_fixups w25q256_fixups = { ++ .post_bfpt = w25q256_post_bfpt_fixups, ++}; ++ + /* NOTE: double check command sets and memory organization when you add + * more nor chips. This current list focusses on newer chips, which + * have been converging on command sets which including JEDEC ID. +@@ -2508,7 +2534,8 @@ static const struct flash_info spi_nor_i + { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) }, + { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) }, + { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) }, +- { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, ++ { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) ++ .fixups = &w25q256_fixups }, + { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 512, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024, |