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authorReto Schneider <reto.schneider@husqvarnagroup.com>2021-06-11 11:19:51 +0200
committerHauke Mehrtens <hauke@hauke-m.de>2022-08-06 19:58:46 +0200
commit2293f1abe4d17c9ed9593f4e24fc73836f99dea5 (patch)
tree06b7479d08efec27c97158260f28edb482cef3b3 /target
parent577f3fdbc92c91e252ee3b134637816a240d89f7 (diff)
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ramips: mt7628: fix memory controller reset bit
According to MediaTek MT7688 Datasheet v1.4, as well as the MT7628 counterpart, the memory controller reset bit (MC_RST) is 10, not 20. Reset bit 20 is used for for UART 2 (UART2_RST). Please note: Due to the lack of hardware, I was not able to test this change. Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Diffstat (limited to 'target')
-rw-r--r--target/linux/ramips/dts/mt7628an.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/ramips/dts/mt7628an.dtsi b/target/linux/ramips/dts/mt7628an.dtsi
index 7bc001207b..8ef73dce80 100644
--- a/target/linux/ramips/dts/mt7628an.dtsi
+++ b/target/linux/ramips/dts/mt7628an.dtsi
@@ -76,7 +76,7 @@
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
- resets = <&rstctrl 20>;
+ resets = <&rstctrl 10>;
reset-names = "mc";
interrupt-parent = <&intc>;