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| author | Robert Marko <robert.marko@sartura.hr> | 2021-11-01 13:02:53 +0100 |
|---|---|---|
| committer | David Bauer <mail@david-bauer.net> | 2022-10-02 23:04:38 +0200 |
| commit | 17a55f9c9d71d08277046af93b9809604a2bae11 (patch) | |
| tree | 972b89aa572ab61bca0af3b290e45b82b2499f96 /target | |
| parent | a15ccc2fe016165ee953848c45e738ab4c011df4 (diff) | |
| download | upstream-17a55f9c9d71d08277046af93b9809604a2bae11.tar.gz upstream-17a55f9c9d71d08277046af93b9809604a2bae11.tar.bz2 upstream-17a55f9c9d71d08277046af93b9809604a2bae11.zip | |
ipq40xx: add PSGMII PHY mode define
PSGMII is a Qualcomm specific mode similar to QSGMII but it has 5 SGMII
lines instead of 4 in QSGMII.
This just adds the support for the PHY layer to be able to identify the
mode for further use.
It is required for the DSA driver.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Diffstat (limited to 'target')
| -rw-r--r-- | target/linux/ipq40xx/patches-5.10/704-net-phy-define-PSGMII-PHY-interface-mode.patch | 61 | ||||
| -rw-r--r-- | target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch | 61 |
2 files changed, 122 insertions, 0 deletions
diff --git a/target/linux/ipq40xx/patches-5.10/704-net-phy-define-PSGMII-PHY-interface-mode.patch b/target/linux/ipq40xx/patches-5.10/704-net-phy-define-PSGMII-PHY-interface-mode.patch new file mode 100644 index 0000000000..b98201e0d0 --- /dev/null +++ b/target/linux/ipq40xx/patches-5.10/704-net-phy-define-PSGMII-PHY-interface-mode.patch @@ -0,0 +1,61 @@ +From 3e1825e00dafb68eec25df389b63f3ab3d905b59 Mon Sep 17 00:00:00 2001 +From: Gabor Juhos <j4g8y7@gmail.com> +Date: Fri, 25 Dec 2020 08:02:47 +0100 +Subject: [PATCH] net: phy: define PSGMII PHY interface mode + +The PSGMII interface is similar to QSGMII. The main difference +is that the PSGMII interface combines five SGMII lines into a +single link while in QSGMII only four lines are combined. + +Similarly to the QSGMII, this interface mode might also needs +special handling within the MAC driver. + +Add definitions for the PHY layer to allow to express this type +of connection between the MAC and PHY. + +Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> +--- + Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 + + drivers/net/phy/phylink.c | 1 + + include/linux/phy.h | 3 +++ + 3 files changed, 5 insertions(+) + +--- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml ++++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml +@@ -64,6 +64,7 @@ properties: + - mii + - gmii + - sgmii ++ - psgmii + - qsgmii + - tbi + - rev-mii +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -289,6 +289,7 @@ static int phylink_parse_mode(struct phy + + switch (pl->link_config.interface) { + case PHY_INTERFACE_MODE_SGMII: ++ case PHY_INTERFACE_MODE_PSGMII: + case PHY_INTERFACE_MODE_QSGMII: + phylink_set(pl->supported, 10baseT_Half); + phylink_set(pl->supported, 10baseT_Full); +--- a/include/linux/phy.h ++++ b/include/linux/phy.h +@@ -134,6 +134,7 @@ typedef enum { + PHY_INTERFACE_MODE_XGMII, + PHY_INTERFACE_MODE_XLGMII, + PHY_INTERFACE_MODE_MOCA, ++ PHY_INTERFACE_MODE_PSGMII, + PHY_INTERFACE_MODE_QSGMII, + PHY_INTERFACE_MODE_TRGMII, + PHY_INTERFACE_MODE_100BASEX, +@@ -201,6 +202,8 @@ static inline const char *phy_modes(phy_ + return "xlgmii"; + case PHY_INTERFACE_MODE_MOCA: + return "moca"; ++ case PHY_INTERFACE_MODE_PSGMII: ++ return "psgmii"; + case PHY_INTERFACE_MODE_QSGMII: + return "qsgmii"; + case PHY_INTERFACE_MODE_TRGMII: diff --git a/target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch b/target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch new file mode 100644 index 0000000000..9791652fd3 --- /dev/null +++ b/target/linux/ipq40xx/patches-5.15/704-net-phy-define-PSGMII-PHY-interface-mode.patch @@ -0,0 +1,61 @@ +From 3e1825e00dafb68eec25df389b63f3ab3d905b59 Mon Sep 17 00:00:00 2001 +From: Gabor Juhos <j4g8y7@gmail.com> +Date: Fri, 25 Dec 2020 08:02:47 +0100 +Subject: [PATCH] net: phy: define PSGMII PHY interface mode + +The PSGMII interface is similar to QSGMII. The main difference +is that the PSGMII interface combines five SGMII lines into a +single link while in QSGMII only four lines are combined. + +Similarly to the QSGMII, this interface mode might also needs +special handling within the MAC driver. + +Add definitions for the PHY layer to allow to express this type +of connection between the MAC and PHY. + +Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> +--- + Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 + + drivers/net/phy/phylink.c | 1 + + include/linux/phy.h | 3 +++ + 3 files changed, 5 insertions(+) + +--- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml ++++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml +@@ -64,6 +64,7 @@ properties: + - mii + - gmii + - sgmii ++ - psgmii + - qsgmii + - tbi + - rev-mii +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -293,6 +293,7 @@ static int phylink_parse_mode(struct phy + + switch (pl->link_config.interface) { + case PHY_INTERFACE_MODE_SGMII: ++ case PHY_INTERFACE_MODE_PSGMII: + case PHY_INTERFACE_MODE_QSGMII: + phylink_set(pl->supported, 10baseT_Half); + phylink_set(pl->supported, 10baseT_Full); +--- a/include/linux/phy.h ++++ b/include/linux/phy.h +@@ -138,6 +138,7 @@ typedef enum { + PHY_INTERFACE_MODE_XGMII, + PHY_INTERFACE_MODE_XLGMII, + PHY_INTERFACE_MODE_MOCA, ++ PHY_INTERFACE_MODE_PSGMII, + PHY_INTERFACE_MODE_QSGMII, + PHY_INTERFACE_MODE_TRGMII, + PHY_INTERFACE_MODE_100BASEX, +@@ -209,6 +210,8 @@ static inline const char *phy_modes(phy_ + return "xlgmii"; + case PHY_INTERFACE_MODE_MOCA: + return "moca"; ++ case PHY_INTERFACE_MODE_PSGMII: ++ return "psgmii"; + case PHY_INTERFACE_MODE_QSGMII: + return "qsgmii"; + case PHY_INTERFACE_MODE_TRGMII: |