aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux
diff options
context:
space:
mode:
authorBirger Koblitz <git@birger-koblitz.de>2021-01-21 14:07:38 +0100
committerPetr Štetiar <ynezz@true.cz>2021-01-26 15:06:50 +0100
commitcb39602399e3c3ee48b4f2c39df7bf759418584e (patch)
tree1d7f77f9af79d2b77107308f3df87f8304761101 /target/linux
parent9ad912d159f8a6a2907d6cd6c55082765ba2364b (diff)
downloadupstream-cb39602399e3c3ee48b4f2c39df7bf759418584e.tar.gz
upstream-cb39602399e3c3ee48b4f2c39df7bf759418584e.tar.bz2
upstream-cb39602399e3c3ee48b4f2c39df7bf759418584e.zip
realtek: add detection of RTL930X SoCs and RTL8313 SoC
This adds support to detect RTL930X based SoCs and the RTL9313 SoC. Tested on Zyxel XGS1210-10 (RTL9302B SoC) and the Zyxel XS1930-12 (RTL9313 SoC) Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Diffstat (limited to 'target/linux')
-rw-r--r--target/linux/realtek/files-5.4/arch/mips/rtl838x/prom.c71
1 files changed, 65 insertions, 6 deletions
diff --git a/target/linux/realtek/files-5.4/arch/mips/rtl838x/prom.c b/target/linux/realtek/files-5.4/arch/mips/rtl838x/prom.c
index 5278afae03..3390c04334 100644
--- a/target/linux/realtek/files-5.4/arch/mips/rtl838x/prom.c
+++ b/target/linux/realtek/files-5.4/arch/mips/rtl838x/prom.c
@@ -66,19 +66,64 @@ static void __init prom_init_cmdline(void)
pr_info("Kernel command line: %s\n", arcs_cmdline);
}
+void __init identify_rtl9302(void)
+{
+ switch (sw_r32(RTL93XX_MODEL_NAME_INFO) & 0xfffffff0) {
+ case 0x93020810:
+ soc_info.name = "RTL9302A 12x2.5G";
+ break;
+ case 0x93021010:
+ soc_info.name = "RTL9302B 8x2.5G";
+ break;
+ case 0x93021810:
+ soc_info.name = "RTL9302C 16x2.5G";
+ break;
+ case 0x93022010:
+ soc_info.name = "RTL9302D 24x2.5G";
+ break;
+ case 0x93020800:
+ soc_info.name = "RTL9302A";
+ break;
+ case 0x93021000:
+ soc_info.name = "RTL9302B";
+ break;
+ case 0x93021800:
+ soc_info.name = "RTL9302C";
+ break;
+ case 0x93022000:
+ soc_info.name = "RTL9302D";
+ break;
+ case 0x93023001:
+ soc_info.name = "RTL9302F";
+ break;
+ default:
+ soc_info.name = "RTL9302";
+ }
+}
+
void __init prom_init(void)
{
uint32_t model;
/* uart0 */
- setup_8250_early_printk_port(0xb8002000, 2, 0);
+ setup_8250_early_printk_port(0xb8002000, 2, 0);
- soc_info.sw_base = RTL838X_SW_BASE;
+ model = sw_r32(RTL838X_MODEL_NAME_INFO);
+ pr_info("RTL838X model is %x\n", model);
+ model = model >> 16 & 0xFFFF;
- model = sw_r32(RTL838X_MODEL_NAME_INFO) >> 16;
- if (model != 0x8328 && model != 0x8330 && model != 0x8332 &&
- model != 0x8380 && model != 0x8382)
- model = sw_r32(RTL839X_MODEL_NAME_INFO) >> 16;
+ if ((model != 0x8328) && (model != 0x8330) && (model != 0x8332)
+ && (model != 0x8380) && (model != 0x8382)) {
+ model = sw_r32(RTL839X_MODEL_NAME_INFO);
+ pr_info("RTL839X model is %x\n", model);
+ model = model >> 16 & 0xFFFF;
+ }
+
+ if ((model & 0x8390) != 0x8380 && (model & 0x8390) != 0x8390) {
+ model = sw_r32(RTL93XX_MODEL_NAME_INFO);
+ pr_info("RTL93XX model is %x\n", model);
+ model = model >> 16 & 0xFFFF;
+ }
soc_info.id = model;
@@ -115,10 +160,24 @@ void __init prom_init(void)
soc_info.name = "RTL8393";
soc_info.family = RTL8390_FAMILY_ID;
break;
+ case 0x9301:
+ soc_info.name = "RTL9301";
+ soc_info.family = RTL9300_FAMILY_ID;
+ break;
+ case 0x9302:
+ identify_rtl9302();
+ soc_info.family = RTL9300_FAMILY_ID;
+ break;
+ case 0x9313:
+ soc_info.name = "RTL9313";
+ soc_info.family = RTL9310_FAMILY_ID;
+ break;
default:
soc_info.name = "DEFAULT";
soc_info.family = 0;
}
+
pr_info("SoC Type: %s\n", get_system_type());
+
prom_init_cmdline();
}