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| author | Shiji Yang <yangshiji66@qq.com> | 2023-12-30 19:52:18 +0800 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2024-01-06 21:23:23 +0100 |
| commit | c0d7842bf2d0901697cc7d593f1db787252f549a (patch) | |
| tree | d8f0fbcd72c17f490b27296be0a3c90bb6f70c54 /target/linux | |
| parent | 184bd28064bc591bf907c42afc9e0b9c1b9858b4 (diff) | |
| download | upstream-c0d7842bf2d0901697cc7d593f1db787252f549a.tar.gz upstream-c0d7842bf2d0901697cc7d593f1db787252f549a.tar.bz2 upstream-c0d7842bf2d0901697cc7d593f1db787252f549a.zip | |
ramips: add missing syscon compatible strings for MT7688 and RT3052
MT7688 devices use the "mt7628an.dtsi" as the template. And RT3052
devices use the "rt3050.dtsi" as template. Therefore, we need to add
the corresponding system controller compatible strings to make them
work properly.
Fixes: 1f818b09f8ae ("ramips: add proper system clock and reset driver support for legacy SoCs")
Fixes: #14305
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Diffstat (limited to 'target/linux')
| -rw-r--r-- | target/linux/ramips/dts/mt7628an.dtsi | 2 | ||||
| -rw-r--r-- | target/linux/ramips/dts/rt3050.dtsi | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/ramips/dts/mt7628an.dtsi b/target/linux/ramips/dts/mt7628an.dtsi index 97f77f6b38b..906ea03fe93 100644 --- a/target/linux/ramips/dts/mt7628an.dtsi +++ b/target/linux/ramips/dts/mt7628an.dtsi @@ -39,7 +39,7 @@ #size-cells = <1>; sysc: syscon@0 { - compatible = "ralink,mt7628-sysc", "syscon"; + compatible = "ralink,mt7628-sysc", "ralink,mt7688-sysc", "syscon"; reg = <0x0 0x100>; #clock-cells = <1>; #reset-cells = <1>; diff --git a/target/linux/ramips/dts/rt3050.dtsi b/target/linux/ramips/dts/rt3050.dtsi index d23303964f3..30a3f898cd0 100644 --- a/target/linux/ramips/dts/rt3050.dtsi +++ b/target/linux/ramips/dts/rt3050.dtsi @@ -40,7 +40,7 @@ #size-cells = <1>; sysc: syscon@0 { - compatible = "ralink,rt3050-sysc", "syscon"; + compatible = "ralink,rt3050-sysc", "ralink,rt3052-sysc", "syscon"; reg = <0x0 0x100>; #clock-cells = <1>; #reset-cells = <1>; |