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authorFlorian Fainelli <florian@openwrt.org>2010-03-09 16:59:08 +0000
committerFlorian Fainelli <florian@openwrt.org>2010-03-09 16:59:08 +0000
commit74d40a45b4d41de9b4a4ef3c836d7dbdee9ddb3c (patch)
tree2e32a2de46796e88e1753a089e4cff7e1ffdd9ad /target/linux
parent63350fa59b3e466203f183f7a0846668d1a3f22b (diff)
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fix missing bits in ar7.h after r20037
SVN-Revision: 20086
Diffstat (limited to 'target/linux')
-rw-r--r--target/linux/ar7/files-2.6.30/include/asm-mips/ar7/ar7.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/ar7.h b/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/ar7.h
index 19b5289fdd..f37e82f5cb 100644
--- a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/ar7.h
+++ b/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/ar7.h
@@ -44,8 +44,10 @@
#define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00)
#define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00)
-#define TITAN_REGS_MAC0 (0x08640000)
-#define TITAN_REGS_MAC1 (TITAN_REGS_MAC0 + 0x0800)
+#define TITAN_REGS_ESWITCH_BASE (0x08640000)
+#define TITAN_REGS_MAC0 (TITAN_REGS_ESWITCH_BASE + 0)
+#define TITAN_REGS_MAC1 (TITAN_REGS_ESWITCH_BASE + 0x0800)
+#define TITAN_REGS_MDIO (TITAN_REGS_ESWITCH_BASE + 0x02000)
#define TITAN_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1c00)
#define TITAN_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1300)