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authorINAGAKI Hiroshi <musashino.open@gmail.com>2021-05-06 20:46:42 +0900
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>2021-09-26 00:32:17 +0200
commit3069fffe60941d0848a8e7917132506bd6fa0b6d (patch)
tree59e0c684303c82a1fd616f4750e9a7634a3152a9 /target/linux
parentddaeb73de029d3d93200ff5758f2da89de0d30ce (diff)
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realtek: add "soc" node to soc dtsi in dts-5.10
Add a "soc" node as a simple-bus to rtl838x.dtsi and rtl930x.dtsi. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Diffstat (limited to 'target/linux')
-rw-r--r--target/linux/realtek/dts-5.10/rtl838x.dtsi129
-rw-r--r--target/linux/realtek/dts-5.10/rtl930x.dtsi147
2 files changed, 147 insertions, 129 deletions
diff --git a/target/linux/realtek/dts-5.10/rtl838x.dtsi b/target/linux/realtek/dts-5.10/rtl838x.dtsi
index 1751c57e28..f5903ec174 100644
--- a/target/linux/realtek/dts-5.10/rtl838x.dtsi
+++ b/target/linux/realtek/dts-5.10/rtl838x.dtsi
@@ -75,78 +75,87 @@
interrupt-controller;
};
- intc: rtlintc {
- compatible = "realtek,rtl-intc";
- reg = <0xb8003000 0x20>;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-controller;
- interrupt-map =
- <31 &cpuintc 2>, /* UART0 */
- <30 &cpuintc 1>, /* UART1 */
- <29 &cpuintc 5>, /* TC0 */
- <28 &cpuintc 1>, /* TC1 */
- <27 &cpuintc 1>, /* OCPTO */
- <26 &cpuintc 1>, /* HLXTO */
- <25 &cpuintc 1>, /* SLXTO */
- <24 &cpuintc 4>, /* NIC */
- <23 &cpuintc 4>, /* GPIO_ABCD */
- <22 &cpuintc 4>, /* GPIO_EFGH */
- <21 &cpuintc 4>, /* RTC */
- <20 &cpuintc 3>, /* SWCORE */
- <19 &cpuintc 4>, /* WDT_IP1 */
- <18 &cpuintc 5>; /* WDT_IP2 */
- };
+ soc: soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xb8000000 0x10000>;
+
+ intc: rtlintc@3000 {
+ compatible = "realtek,rtl-intc";
+ reg = <0x3000 0x20>;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupt-map =
+ <31 &cpuintc 2>, /* UART0 */
+ <30 &cpuintc 1>, /* UART1 */
+ <29 &cpuintc 5>, /* TC0 */
+ <28 &cpuintc 1>, /* TC1 */
+ <27 &cpuintc 1>, /* OCPTO */
+ <26 &cpuintc 1>, /* HLXTO */
+ <25 &cpuintc 1>, /* SLXTO */
+ <24 &cpuintc 4>, /* NIC */
+ <23 &cpuintc 4>, /* GPIO_ABCD */
+ <22 &cpuintc 4>, /* GPIO_EFGH */
+ <21 &cpuintc 4>, /* RTC */
+ <20 &cpuintc 3>, /* SWCORE */
+ <19 &cpuintc 4>, /* WDT_IP1 */
+ <18 &cpuintc 5>; /* WDT_IP2 */
+ };
- spi0: spi@b8001200 {
- compatible = "realtek,rtl8380-spi";
- reg = <0xb8001200 0x100>;
+ spi0: spi@1200 {
+ compatible = "realtek,rtl8380-spi";
+ reg = <0x1200 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
- uart0: uart@b8002000 {
- compatible = "ns16550a";
- reg = <0xb8002000 0x100>;
+ uart0: uart@2000 {
+ compatible = "ns16550a";
+ reg = <0x2000 0x100>;
- clock-frequency = <200000000>;
+ clock-frequency = <200000000>;
- interrupt-parent = <&intc>;
- interrupts = <31>;
+ interrupt-parent = <&intc>;
+ interrupts = <31>;
- reg-io-width = <1>;
- reg-shift = <2>;
- fifo-size = <1>;
- no-loopback-test;
- };
+ reg-io-width = <1>;
+ reg-shift = <2>;
+ fifo-size = <1>;
+ no-loopback-test;
+ };
- uart1: uart@b8002100 {
- pinctrl-names = "default";
- pinctrl-0 = <&enable_uart1>;
+ uart1: uart@2100 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&enable_uart1>;
- compatible = "ns16550a";
- reg = <0xb8002100 0x100>;
+ compatible = "ns16550a";
+ reg = <0x2100 0x100>;
- clock-frequency = <200000000>;
+ clock-frequency = <200000000>;
- interrupt-parent = <&intc>;
- interrupts = <30>;
+ interrupt-parent = <&intc>;
+ interrupts = <30>;
- reg-io-width = <1>;
- reg-shift = <2>;
- fifo-size = <1>;
- no-loopback-test;
- };
+ reg-io-width = <1>;
+ reg-shift = <2>;
+ fifo-size = <1>;
+ no-loopback-test;
- gpio0: gpio-controller@b8003500 {
- compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
- reg = <0xb8003500 0x20>;
- gpio-controller;
- #gpio-cells = <2>;
- ngpios = <24>;
- interrupt-parent = <&intc>;
- interrupts = <23>;
+ status = "disabled";
+ };
+
+ gpio0: gpio-controller@3500 {
+ compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
+ reg = <0x3500 0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <24>;
+ interrupt-parent = <&intc>;
+ interrupts = <23>;
+ };
};
gpio1: rtl8231-gpio {
diff --git a/target/linux/realtek/dts-5.10/rtl930x.dtsi b/target/linux/realtek/dts-5.10/rtl930x.dtsi
index c0cb53af08..d01307a35d 100644
--- a/target/linux/realtek/dts-5.10/rtl930x.dtsi
+++ b/target/linux/realtek/dts-5.10/rtl930x.dtsi
@@ -80,26 +80,6 @@
interrupt-controller;
};
- intc: rtlintc {
- compatible = "realtek,rtl-intc";
- reg = <0xb8003000 0x20>;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-controller;
- interrupt-map =
- <31 &cpuintc 1>, /* UART1 */
- <30 &cpuintc 2>, /* UART0 */
- <28 &cpuintc 1>, /* USB_H2 */
- <24 &cpuintc 4>, /* NIC */
- <23 &cpuintc 3>, /* SWCORE */
- <13 &cpuintc 4>, /* GPIO_ABCD */
- <11 &cpuintc 1>, /* TC4 */
- <10 &cpuintc 1>, /* TC3 */
- <9 &cpuintc 1>, /* TC2 */
- <8 &cpuintc 1>, /* TC1 */
- <7 &cpuintc 5>; /* TC0 */
- };
-
osc: oscillator {
compatible = "fixed-clock";
#clock-cells = <1>;
@@ -107,67 +87,96 @@
clock-output-names = "osc";
};
- timer: timer@b8003200 {
- compatible = "realtek,rtl9300-timer";
- reg = <0xb8003200 0x60>;
- interrupt-parent = <&intc>;
- interrupts = <8>;
- interrupt-names = "ostimer";
- clocks = <&osc 0>;
- };
+ soc: soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xb8000000 0x10000>;
+
+ intc: rtlintc@3000 {
+ compatible = "realtek,rtl-intc";
+ reg = <0x3000 0x20>;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupt-map =
+ <31 &cpuintc 1>, /* UART1 */
+ <30 &cpuintc 2>, /* UART0 */
+ <28 &cpuintc 1>, /* USB_H2 */
+ <24 &cpuintc 4>, /* NIC */
+ <23 &cpuintc 3>, /* SWCORE */
+ <13 &cpuintc 4>, /* GPIO_ABCD */
+ <11 &cpuintc 1>, /* TC4 */
+ <10 &cpuintc 1>, /* TC3 */
+ <9 &cpuintc 1>, /* TC2 */
+ <8 &cpuintc 1>, /* TC1 */
+ <7 &cpuintc 5>; /* TC0 */
+ };
- spi0: spi@b8001200 {
- compatible = "realtek,rtl8380-spi";
- reg = <0xb8001200 0x100>;
+ timer: timer@3200 {
+ compatible = "realtek,rtl9300-timer";
+ reg = <0x3200 0x60>;
+ interrupt-parent = <&intc>;
+ interrupts = <8>;
+ interrupt-names = "ostimer";
+ clocks = <&osc 0>;
+ };
- #address-cells = <1>;
- #size-cells = <0>;
- };
+ spi0: spi@1200 {
+ compatible = "realtek,rtl8380-spi";
+ reg = <0x1200 0x100>;
- uart0: uart@b8002000 {
- compatible = "ns16550a";
- reg = <0xb8002000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
- clock-frequency = <175000000>;
+ uart0: uart@2000 {
+ compatible = "ns16550a";
+ reg = <0x2000 0x100>;
- interrupt-parent = <&intc>;
- interrupts = <30>;
+ clock-frequency = <175000000>;
- reg-io-width = <1>;
- reg-shift = <2>;
- fifo-size = <1>;
- no-loopback-test;
- };
+ interrupt-parent = <&intc>;
+ interrupts = <30>;
- uart1: uart@b8002100 {
- compatible = "ns16550a";
- reg = <0xb8002100 0x100>;
+ reg-io-width = <1>;
+ reg-shift = <2>;
+ fifo-size = <1>;
+ no-loopback-test;
+ };
- clock-frequency = <175000000>;
+ uart1: uart@2100 {
+ compatible = "ns16550a";
+ reg = <0x2100 0x100>;
- interrupt-parent = <&intc>;
- interrupts = <31>;
+ clock-frequency = <175000000>;
- reg-io-width = <1>;
- reg-shift = <2>;
- fifo-size = <1>;
- no-loopback-test;
- };
+ interrupt-parent = <&intc>;
+ interrupts = <31>;
- gpio0: gpio-controller@b8003500 {
- compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
- reg = <0xb8003500 0x20>;
- gpio-controller;
- #gpio-cells = <2>;
- ngpios = <32>;
- interrupt-parent = <&intc>;
- interrupts = <31>;
+ reg-io-width = <1>;
+ reg-shift = <2>;
+ fifo-size = <1>;
+ no-loopback-test;
- /*
- * currently, RTL930x GPIO is not supported in
- * upstreamed driver (gpio-realtek-otto)
- */
- status = "disabled";
+ status = "disabled";
+ };
+
+ gpio0: gpio-controller@3500 {
+ compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
+ reg = <0x3500 0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <32>;
+ interrupt-parent = <&intc>;
+ interrupts = <31>;
+
+ /*
+ * currently, RTL930x GPIO is not supported in
+ * upstreamed driver (gpio-realtek-otto)
+ */
+ status = "disabled";
+ };
};
ethernet0: ethernet@bb00a300 {