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authorJohn Crispin <john@openwrt.org>2016-03-23 12:52:12 +0000
committerJohn Crispin <john@openwrt.org>2016-03-23 12:52:12 +0000
commit26d18d4e072201f7620c3daf8fabfb33400630b5 (patch)
tree9ab700ba8d0d9bc8b6fba6aef0b6ebe1152c2c79 /target/linux
parentbdf76faa3e632adbdb19799211c2e6db6744d827 (diff)
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ar71xx: Use private version of ath79_setup_qca955x_eth_cfg for MR1750
The MR1750 must unset some bits in ETH_CFG which were set by u-boot to work correctly under OpenWrt. But the global function ath79_setup_qca955x_eth_cfg will not unset all of them to increase the backward compatiblity with older mach-* files. A private (simplified) version for MR1750 can be used instead. Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com> SVN-Revision: 49070
Diffstat (limited to 'target/linux')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c24
1 files changed, 23 insertions, 1 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c
index 83acd4cc34..e3c04e7756 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c
@@ -108,6 +108,28 @@ static struct mdio_board_info mr1750_mdio0_info[] = {
},
};
+static void __init mr1750_setup_qca955x_eth_cfg(u32 mask,
+ unsigned int rxd,
+ unsigned int rxdv,
+ unsigned int txd,
+ unsigned int txe)
+{
+ void __iomem *base;
+ u32 t;
+
+ base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
+
+ t = mask;
+ t |= rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT;
+ t |= rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT;
+ t |= txd << QCA955X_ETH_CFG_TXD_DELAY_SHIFT;
+ t |= txe << QCA955X_ETH_CFG_TXE_DELAY_SHIFT;
+
+ __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
+
+ iounmap(base);
+}
+
static void __init mr1750_setup(void)
{
u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
@@ -129,7 +151,7 @@ static void __init mr1750_setup(void)
ath79_register_wmac(art + MR1750_WMAC_CALDATA_OFFSET, mac);
ath79_register_pci();
- ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
+ mr1750_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(mr1750_mdio0_info,