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author | Zoltan HERPAI <wigyori@uid0.hu> | 2014-02-05 08:42:28 +0000 |
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committer | Zoltan HERPAI <wigyori@uid0.hu> | 2014-02-05 08:42:28 +0000 |
commit | d1ca9d207acc1056bd460f7cba2f50af87004f58 (patch) | |
tree | 3ec56a328c48048eb595e971cf2f7f51e73404ed /target/linux/sunxi/patches-3.13/117-clk-sunxi-factors_clk_setup_update.patch | |
parent | 1dd76f71e1aa7e8dae83aed641ac527ac4f8fadd (diff) | |
download | upstream-d1ca9d207acc1056bd460f7cba2f50af87004f58.tar.gz upstream-d1ca9d207acc1056bd460f7cba2f50af87004f58.tar.bz2 upstream-d1ca9d207acc1056bd460f7cba2f50af87004f58.zip |
sunxi: initial 3.13 support
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39471 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/sunxi/patches-3.13/117-clk-sunxi-factors_clk_setup_update.patch')
-rw-r--r-- | target/linux/sunxi/patches-3.13/117-clk-sunxi-factors_clk_setup_update.patch | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/target/linux/sunxi/patches-3.13/117-clk-sunxi-factors_clk_setup_update.patch b/target/linux/sunxi/patches-3.13/117-clk-sunxi-factors_clk_setup_update.patch new file mode 100644 index 0000000000..be38689ca5 --- /dev/null +++ b/target/linux/sunxi/patches-3.13/117-clk-sunxi-factors_clk_setup_update.patch @@ -0,0 +1,79 @@ +From 8a3282a0a185108e37e7a48437b58d956ff56f4a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar> +Date: Mon, 23 Dec 2013 00:32:36 -0300 +Subject: [PATCH] clk: sunxi: make factors_clk_setup return the clock it + registers +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +We will be needing this to register a factor clock as parent with leaf +divisors on a single call. + +Signed-off-by: Emilio López <emilio@elopez.com.ar> +Acked-by: Mike Turquette <mturquette@linaro.org> +--- + drivers/clk/sunxi/clk-sunxi.c | 15 ++++++++------- + 1 file changed, 8 insertions(+), 7 deletions(-) + +diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c +index 52f34ec..96ccb3c 100644 +--- a/drivers/clk/sunxi/clk-sunxi.c ++++ b/drivers/clk/sunxi/clk-sunxi.c +@@ -317,8 +317,8 @@ struct factors_data { + .getter = sun4i_get_apb1_factors, + }; + +-static void __init sunxi_factors_clk_setup(struct device_node *node, +- struct factors_data *data) ++static struct clk * __init sunxi_factors_clk_setup(struct device_node *node, ++ const struct factors_data *data) + { + struct clk *clk; + struct clk_factors *factors; +@@ -340,14 +340,14 @@ static void __init sunxi_factors_clk_setup(struct device_node *node, + + factors = kzalloc(sizeof(struct clk_factors), GFP_KERNEL); + if (!factors) +- return; ++ return NULL; + + /* Add a gate if this factor clock can be gated */ + if (data->enable) { + gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL); + if (!gate) { + kfree(factors); +- return; ++ return NULL; + } + + /* set up gate properties */ +@@ -363,7 +363,7 @@ static void __init sunxi_factors_clk_setup(struct device_node *node, + if (!mux) { + kfree(factors); + kfree(gate); +- return; ++ return NULL; + } + + /* set up gate properties */ +@@ -384,13 +384,14 @@ static void __init sunxi_factors_clk_setup(struct device_node *node, + parents, i, + mux_hw, &clk_mux_ops, + &factors->hw, &clk_factors_ops, +- gate_hw, &clk_gate_ops, +- i ? 0 : CLK_IS_ROOT); ++ gate_hw, &clk_gate_ops, 0); + + if (!IS_ERR(clk)) { + of_clk_add_provider(node, of_clk_src_simple_get, clk); + clk_register_clkdev(clk, clk_name, NULL); + } ++ ++ return clk; + } + + +-- +1.8.5.1 + |