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authorFlorian Fainelli <florian@openwrt.org>2008-01-11 10:42:06 +0000
committerFlorian Fainelli <florian@openwrt.org>2008-01-11 10:42:06 +0000
commit918e830718c2216a64d65f7ad58a784a841cd296 (patch)
treeeaa219ff7e8181c8f699a72e0892def830588731 /target/linux/rb532/files/arch/mips
parent3d7e6cc2909b520b8a79f52885984fb1103d550b (diff)
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Upgrade rb532 to .23, provide generic GPIO API to this board
SVN-Revision: 10171
Diffstat (limited to 'target/linux/rb532/files/arch/mips')
-rw-r--r--target/linux/rb532/files/arch/mips/pci/fixup-rb500.c6
-rw-r--r--target/linux/rb532/files/arch/mips/rb500/Makefile2
-rw-r--r--target/linux/rb532/files/arch/mips/rb500/gpio.c159
-rw-r--r--target/linux/rb532/files/arch/mips/rb500/irq.c3
-rw-r--r--target/linux/rb532/files/arch/mips/rb500/misc.c56
-rw-r--r--target/linux/rb532/files/arch/mips/rb500/serial.c3
6 files changed, 168 insertions, 61 deletions
diff --git a/target/linux/rb532/files/arch/mips/pci/fixup-rb500.c b/target/linux/rb532/files/arch/mips/pci/fixup-rb500.c
index ceb53b0aa9..76c465fea4 100644
--- a/target/linux/rb532/files/arch/mips/pci/fixup-rb500.c
+++ b/target/linux/rb532/files/arch/mips/pci/fixup-rb500.c
@@ -24,12 +24,14 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/autoconf.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
+#include <asm/pci.h>
+#include <asm/io.h>
+
#include <asm/rc32434/rc32434.h>
static int __devinitdata irq_map[2][12] = {
@@ -37,7 +39,7 @@ static int __devinitdata irq_map[2][12] = {
{ 0, 0, 1, 3, 0, 2, 1, 3, 0, 2, 1, 3 }
};
-int __devinit pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
int irq = 0;
diff --git a/target/linux/rb532/files/arch/mips/rb500/Makefile b/target/linux/rb532/files/arch/mips/rb500/Makefile
index 3a6a2855a3..d3ae3d9122 100644
--- a/target/linux/rb532/files/arch/mips/rb500/Makefile
+++ b/target/linux/rb532/files/arch/mips/rb500/Makefile
@@ -2,4 +2,4 @@
# Makefile for the RB500 board specific parts of the kernel
#
-obj-y += irq.o time.o setup.o serial.o prom.o misc.o devices.o
+obj-y += irq.o time.o setup.o serial.o prom.o gpio.o devices.o
diff --git a/target/linux/rb532/files/arch/mips/rb500/gpio.c b/target/linux/rb532/files/arch/mips/rb500/gpio.c
new file mode 100644
index 0000000000..9e19a63363
--- /dev/null
+++ b/target/linux/rb532/files/arch/mips/rb500/gpio.c
@@ -0,0 +1,159 @@
+/*
+ * Miscellaneous functions for IDT EB434 board
+ *
+ * Copyright 2004 IDT Inc. (rischelp@idt.com)
+ * Copyright 2006 Phil Sutter <n0-1@freewrt.org>
+ * Copyright 2007 Florian Fainelli <florian@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+
+#include <asm/addrspace.h>
+#include <asm/gpio.h>
+
+#include <asm/rc32434/rb.h>
+
+#define GPIO_BADDR 0xb8050000
+
+static volatile unsigned char *devCtl3Base;
+static unsigned char latchU5State;
+static spinlock_t clu5Lock = SPIN_LOCK_UNLOCKED;
+
+struct rb500_gpio_reg __iomem *rb500_gpio_reg0;
+EXPORT_SYMBOL(rb500_gpio_reg0);
+
+static struct resource rb500_gpio_reg0_res[] = {
+ {
+ .name = "gpio_reg0",
+ .start = GPIO_BADDR,
+ .end = GPIO_BADDR + sizeof(struct rb500_gpio_reg),
+ .flags = IORESOURCE_MEM,
+ }
+};
+
+void set434Reg(unsigned regOffs, unsigned bit, unsigned len, unsigned val)
+{
+ unsigned flags, data;
+ unsigned i = 0;
+
+ spin_lock_irqsave(&clu5Lock, flags);
+ data = *(volatile unsigned *) (IDT434_REG_BASE + regOffs);
+ for (i = 0; i != len; ++i) {
+ if (val & (1 << i))
+ data |= (1 << (i + bit));
+ else
+ data &= ~(1 << (i + bit));
+ }
+ *(volatile unsigned *) (IDT434_REG_BASE + regOffs) = data;
+ spin_unlock_irqrestore(&clu5Lock, flags);
+}
+
+EXPORT_SYMBOL(set434Reg);
+
+void changeLatchU5(unsigned char orMask, unsigned char nandMask)
+{
+ unsigned flags;
+
+ spin_lock_irqsave(&clu5Lock, flags);
+ latchU5State = (latchU5State | orMask) & ~nandMask;
+ if (!devCtl3Base)
+ devCtl3Base = (volatile unsigned char *)
+ KSEG1ADDR(*(volatile unsigned *)
+ KSEG1ADDR(0x18010030));
+ *devCtl3Base = latchU5State;
+ spin_unlock_irqrestore(&clu5Lock, flags);
+}
+
+EXPORT_SYMBOL(changeLatchU5);
+
+unsigned char getLatchU5State(void)
+{
+ return latchU5State;
+}
+
+EXPORT_SYMBOL(getLatchU5State);
+
+int rb500_gpio_get_value(unsigned gpio)
+{
+ u32 reg;
+
+ reg = readl(&rb500_gpio_reg0->gpiod);
+ return (reg & (1 << gpio));
+}
+
+EXPORT_SYMBOL(rb500_gpio_get_value);
+
+void rb500_gpio_set_value(unsigned gpio, int value)
+{
+ u32 reg;
+
+ reg = (u32)&rb500_gpio_reg0->gpiod;
+
+ writel(value, (void *)(reg & (1 << gpio)));
+}
+
+EXPORT_SYMBOL(rb500_gpio_set_value);
+
+int rb500_gpio_direction_input(unsigned gpio)
+{
+ u32 reg;
+
+ reg = (u32)&rb500_gpio_reg0->gpiocfg;
+ writel(0, (void *)(reg & (1 << gpio)));
+
+ return 0;
+}
+
+EXPORT_SYMBOL(rb500_gpio_direction_input);
+
+int rb500_gpio_direction_output(unsigned gpio, int value)
+{
+ u32 reg;
+
+ reg = (u32)&rb500_gpio_reg0->gpiocfg;
+ if (value)
+ writel(1, (void *)(reg & (1 << gpio)));
+
+ return 0;
+}
+
+EXPORT_SYMBOL(rb500_gpio_direction_output);
+
+int __init rb500_gpio_init(void)
+{
+ rb500_gpio_reg0 = ioremap_nocache(rb500_gpio_reg0_res[0].start,
+ rb500_gpio_reg0_res[0].end - rb500_gpio_reg0_res[0].start);
+
+ if (!rb500_gpio_reg0) {
+ printk(KERN_ERR "rb500: cannot remap GPIO register 0\n");
+ return -ENXIO;
+ }
+
+ return 0;
+}
diff --git a/target/linux/rb532/files/arch/mips/rb500/irq.c b/target/linux/rb532/files/arch/mips/rb500/irq.c
index 47521c7c57..5a4d349d49 100644
--- a/target/linux/rb532/files/arch/mips/rb500/irq.c
+++ b/target/linux/rb532/files/arch/mips/rb500/irq.c
@@ -63,6 +63,7 @@ static void rb500_enable_irq(unsigned int irq_nr);
static void rb500_disable_irq(unsigned int irq_nr);
extern void __init init_generic_irq(void);
+extern struct rb500_gpio_reg __iomem *rb500_gpio_reg0;
typedef struct {
u32 mask; /* mask of valid bits in pending/mask registers */
@@ -205,7 +206,7 @@ static void rb500_end_irq(unsigned int irq_nr)
intr_bit = 1 << ip;
if (irq_nr >= GROUP4_IRQ_BASE && irq_nr <= (GROUP4_IRQ_BASE + 13)) {
- gpio->gpioistat = gpio->gpioistat & ~intr_bit;
+ rb500_gpio_reg0->gpioistat = rb500_gpio_reg0->gpioistat & ~intr_bit;
}
enable_local_irq(group_to_ip(group));
diff --git a/target/linux/rb532/files/arch/mips/rb500/misc.c b/target/linux/rb532/files/arch/mips/rb500/misc.c
deleted file mode 100644
index 42039b7aae..0000000000
--- a/target/linux/rb532/files/arch/mips/rb500/misc.c
+++ /dev/null
@@ -1,56 +0,0 @@
-#include <linux/module.h>
-#include <linux/kernel.h> /* printk() */
-#include <linux/types.h> /* size_t */
-#include <linux/pci.h>
-#include <linux/spinlock.h>
-#include <asm/rc32434/rb.h>
-
-#define GPIO_BADDR 0xb8050000
-
-
-static volatile unsigned char *devCtl3Base = 0;
-static unsigned char latchU5State = 0;
-static spinlock_t clu5Lock = SPIN_LOCK_UNLOCKED;
-
-void set434Reg(unsigned regOffs, unsigned bit, unsigned len, unsigned val) {
- unsigned flags, data;
- unsigned i = 0;
- spin_lock_irqsave(&clu5Lock, flags);
- data = *(volatile unsigned *) (IDT434_REG_BASE + regOffs);
- for (i = 0; i != len; ++i) {
- if (val & (1 << i)) data |= (1 << (i + bit));
- else data &= ~(1 << (i + bit));
- }
- *(volatile unsigned *) (IDT434_REG_BASE + regOffs) = data;
- spin_unlock_irqrestore(&clu5Lock, flags);
-}
-
-void changeLatchU5(unsigned char orMask, unsigned char nandMask) {
- unsigned flags;
- spin_lock_irqsave(&clu5Lock, flags);
- latchU5State = (latchU5State | orMask) & ~nandMask;
- if( !devCtl3Base) devCtl3Base = (volatile unsigned char *)
- KSEG1ADDR(*(volatile unsigned *) KSEG1ADDR(0x18010030));
- *devCtl3Base = latchU5State;
- spin_unlock_irqrestore(&clu5Lock, flags);
-}
-
-u32 gpio_get(gpio_func func)
-{
- return readl((void *) GPIO_BADDR + func);
-}
-
-void gpio_set(gpio_func func, u32 mask, u32 value)
-{
- u32 val = readl((void *) GPIO_BADDR + func);
-
- val &= ~mask;
- val |= value & mask;
-
- writel(val, (void *) GPIO_BADDR + func);
-}
-
-EXPORT_SYMBOL(gpio_set);
-EXPORT_SYMBOL(gpio_get);
-EXPORT_SYMBOL(set434Reg);
-EXPORT_SYMBOL(changeLatchU5);
diff --git a/target/linux/rb532/files/arch/mips/rb500/serial.c b/target/linux/rb532/files/arch/mips/rb500/serial.c
index 49c5252feb..25a03e0108 100644
--- a/target/linux/rb532/files/arch/mips/rb500/serial.c
+++ b/target/linux/rb532/files/arch/mips/rb500/serial.c
@@ -45,6 +45,7 @@
#include <linux/tty.h>
#include <linux/serial.h>
#include <linux/serial_core.h>
+#include <linux/serial_8250.h>
#include <asm/time.h>
#include <asm/cpu.h>
@@ -59,7 +60,7 @@ static struct uart_port serial_req = {
.type = PORT_16550A,
.line = 0,
.irq = RC32434_UART0_IRQ,
- .flags = STD_COM_FLAGS,
+ //.flags = STD_COM_FLAGS,
.iotype = UPIO_MEM,
.membase = (char *) KSEG1ADDR(RC32434_UART0_BASE),
// .fifosize = 14