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authorIlya Lipnitskiy <ilya.lipnitskiy@gmail.com>2021-02-27 16:00:24 -0800
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>2021-03-06 11:24:12 +0100
commitef1e6520164e19451bc9cb8275cf293a699e1684 (patch)
treebd6e06143301ff02a4432227671fb0ec3e781d3d /target/linux/ramips/patches-5.10/850-awake-rt305x-dwc2-controller.patch
parent3149d8e7be6539897e9f3873ed9a2b9213a798a9 (diff)
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ramips: 5.10: rename patches to follow guide
Rename patches to follow the 3-digit classification from the OpenWrt Developer Guide. https://openwrt.org/docs/guide-developer/build-system/use-patches-with-buildsystem#naming_patches Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Diffstat (limited to 'target/linux/ramips/patches-5.10/850-awake-rt305x-dwc2-controller.patch')
-rw-r--r--target/linux/ramips/patches-5.10/850-awake-rt305x-dwc2-controller.patch15
1 files changed, 15 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-5.10/850-awake-rt305x-dwc2-controller.patch b/target/linux/ramips/patches-5.10/850-awake-rt305x-dwc2-controller.patch
new file mode 100644
index 0000000000..7110a5b808
--- /dev/null
+++ b/target/linux/ramips/patches-5.10/850-awake-rt305x-dwc2-controller.patch
@@ -0,0 +1,15 @@
+--- a/drivers/usb/dwc2/platform.c
++++ b/drivers/usb/dwc2/platform.c
+@@ -431,6 +431,12 @@ static int dwc2_driver_probe(struct plat
+ if (retval)
+ return retval;
+
++ /* Enable USB port before any regs access */
++ if (readl(hsotg->regs + PCGCTL) & 0x0f) {
++ writel(0x00, hsotg->regs + PCGCTL);
++ /* TODO: mdelay(25) here? vendor driver don't use it */
++ }
++
+ hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg);
+
+ retval = dwc2_get_dr_mode(hsotg);