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| author | Michael Lyle <mlyle@lyle.org> | 2022-10-29 21:00:41 -0700 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2022-11-12 21:55:11 +0100 |
| commit | 9155d405130041e9abaf1fcbc03dd7f6746a1fc9 (patch) | |
| tree | 1afa29222a095d07acd3c9d0fe651fd0ee92216a /target/linux/ramips/patches-5.10/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch | |
| parent | ca124d2e4b5cb2ea74640198721e85571a5c43b3 (diff) | |
| download | upstream-9155d405130041e9abaf1fcbc03dd7f6746a1fc9.tar.gz upstream-9155d405130041e9abaf1fcbc03dd7f6746a1fc9.tar.bz2 upstream-9155d405130041e9abaf1fcbc03dd7f6746a1fc9.zip | |
ramips: gl-mt1300: downclock SPI to 50MHz
The SPI max frequency was set to 80MHz, considerably higher than the
vendor clocks it in their firmware (10MHz). Multiple users reported
jffs2 corruption/instability in GitHub issue #10461.
My unit has a W25Q256; datasheet specifies maximum SPI frequency for
read command of 50MHz.
Thanks to @DragonBlueP for suggesting to eliminate m25p,fast-read;
and @MPannen1979 for identifying the problem.
Fixes: #10461
Signed-off-by: Michael Lyle <mlyle@lyle.org>
(cherry picked from commit 961e01fc67e7d9e60557df3474fa326216aa4839)
Diffstat (limited to 'target/linux/ramips/patches-5.10/830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch')
0 files changed, 0 insertions, 0 deletions