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authorAdrian Schmutzler <freifunk@adrianschmutzler.de>2020-08-21 16:18:23 +0200
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>2020-08-26 23:58:01 +0200
commitadf830a3a5cc8dc1813457922452413894a5f948 (patch)
treeace714aa2ba0fe89a5c8f62624557ca322f0ba8f /target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c
parentc1aa2d4411659d336d05a1886223d53d6bb2c330 (diff)
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ramips: remove further mt7621 code from local ethernet driver
While commit 734a8c46e703 focussed on removing stuff directly selected by the NET_RALINK_* symbols, this patch removes additional unused mt7621-specific code from the ethernet driver. As with the previous patch, the main reason is to reduce the amount of code we have to maintain and care about. Note that this patch still keeps a few lines with IS_ENABLED(CONFIG_SOC_MT7621) in mtk_eth_soc.h/.c, as this file is still selected for the mt7621 subtarget. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c')
-rw-r--r--target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c12
1 files changed, 0 insertions, 12 deletions
diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c
index c4684d02d6..f442d558e1 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c
@@ -27,16 +27,11 @@
#define MT7620A_CDMA_CSG_CFG 0x400
#define MT7620_DMA_VID (MT7620A_CDMA_CSG_CFG | 0x30)
-#define MT7621_CDMP_IG_CTRL (MT7620A_CDMA_CSG_CFG + 0x00)
-#define MT7621_CDMP_EG_CTRL (MT7620A_CDMA_CSG_CFG + 0x04)
#define MT7620A_RESET_FE BIT(21)
-#define MT7621_RESET_FE BIT(6)
#define MT7620A_RESET_ESW BIT(23)
#define MT7620_L4_VALID BIT(23)
-#define MT7621_L4_VALID BIT(24)
#define MT7620_TX_DMA_UDF BIT(15)
-#define MT7621_TX_DMA_UDF BIT(19)
#define TX_DMA_FP_BMAP ((0xff) << 19)
#define CDMA_ICS_EN BIT(2)
@@ -53,11 +48,6 @@
#define MT7620_GDM1_TX_GBCNT (MT7620_REG_MIB_OFFSET + 0x300)
#define MT7620_GDM2_TX_GBCNT (MT7620_GDM1_TX_GBCNT + 0x40)
-#define MT7621_REG_MIB_OFFSET 0x2000
-#define MT7621_PPE_AC_BCNT0 (MT7621_REG_MIB_OFFSET + 0x00)
-#define MT7621_GDM1_TX_GBCNT (MT7621_REG_MIB_OFFSET + 0x400)
-#define MT7621_GDM2_TX_GBCNT (MT7621_GDM1_TX_GBCNT + 0x40)
-
#define GSW_REG_GDMA1_MAC_ADRL 0x508
#define GSW_REG_GDMA1_MAC_ADRH 0x50C
@@ -68,8 +58,6 @@
* but after test it should be BIT(13).
*/
#define MT7620_FE_GDM1_AF BIT(13)
-#define MT7621_FE_GDM1_AF BIT(28)
-#define MT7621_FE_GDM2_AF BIT(29)
static const u16 mt7620_reg_table[FE_REG_COUNT] = {
[FE_REG_PDMA_GLO_CFG] = RT5350_PDMA_GLO_CFG,