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author | Gabor Juhos <juhosg@openwrt.org> | 2011-03-27 19:19:59 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2011-03-27 19:19:59 +0000 |
commit | 8eb654c4ef2e248eed9d6b380c16c90d1e4d323b (patch) | |
tree | 9dd7c796674149dd2c6509f7fd076dadccbd898d /target/linux/ramips/files/arch/mips/ralink/common | |
parent | 2e1b24966f863bdab876cb72d77d4a22dd295c1b (diff) | |
download | upstream-8eb654c4ef2e248eed9d6b380c16c90d1e4d323b.tar.gz upstream-8eb654c4ef2e248eed9d6b380c16c90d1e4d323b.tar.bz2 upstream-8eb654c4ef2e248eed9d6b380c16c90d1e4d323b.zip |
ramips: define GPIO chips separately for each SoCs
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@26326 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/files/arch/mips/ralink/common')
-rw-r--r-- | target/linux/ramips/files/arch/mips/ralink/common/gpio.c | 75 |
1 files changed, 5 insertions, 70 deletions
diff --git a/target/linux/ramips/files/arch/mips/ralink/common/gpio.c b/target/linux/ramips/files/arch/mips/ralink/common/gpio.c index ebaceead0e..feb6cc2ec9 100644 --- a/target/linux/ramips/files/arch/mips/ralink/common/gpio.c +++ b/target/linux/ramips/files/arch/mips/ralink/common/gpio.c @@ -86,72 +86,6 @@ static int ramips_gpio_get(struct gpio_chip *chip, unsigned offset) return !!(t & (1 << offset)); } -static struct ramips_gpio_chip ramips_gpio_chip0 = { - .chip = { - .label = "ramips-gpio0", - .base = 0, - .ngpio = RALINK_SOC_GPIO0_COUNT, - }, - .regs = { - [RAMIPS_GPIO_REG_INT] = GPIO0_REG_INT, - [RAMIPS_GPIO_REG_EDGE] = GPIO0_REG_EDGE, - [RAMIPS_GPIO_REG_RENA] = GPIO0_REG_RENA, - [RAMIPS_GPIO_REG_FENA] = GPIO0_REG_FENA, - [RAMIPS_GPIO_REG_DATA] = GPIO0_REG_DATA, - [RAMIPS_GPIO_REG_DIR] = GPIO0_REG_DIR, - [RAMIPS_GPIO_REG_POL] = GPIO0_REG_POL, - [RAMIPS_GPIO_REG_SET] = GPIO0_REG_SET, - [RAMIPS_GPIO_REG_RESET] = GPIO0_REG_RESET, - [RAMIPS_GPIO_REG_TOGGLE] = GPIO0_REG_TOGGLE, - }, - .map_base = RALINK_SOC_GPIO_BASE, - .map_size = PAGE_SIZE, -}; - -static struct ramips_gpio_chip ramips_gpio_chip1 = { - .chip = { - .label = "ramips-gpio1", - .base = 32, - .ngpio = RALINK_SOC_GPIO1_COUNT, - }, - .regs = { - [RAMIPS_GPIO_REG_INT] = GPIO1_REG_INT, - [RAMIPS_GPIO_REG_EDGE] = GPIO1_REG_EDGE, - [RAMIPS_GPIO_REG_RENA] = GPIO1_REG_RENA, - [RAMIPS_GPIO_REG_FENA] = GPIO1_REG_FENA, - [RAMIPS_GPIO_REG_DATA] = GPIO1_REG_DATA, - [RAMIPS_GPIO_REG_DIR] = GPIO1_REG_DIR, - [RAMIPS_GPIO_REG_POL] = GPIO1_REG_POL, - [RAMIPS_GPIO_REG_SET] = GPIO1_REG_SET, - [RAMIPS_GPIO_REG_RESET] = GPIO1_REG_RESET, - [RAMIPS_GPIO_REG_TOGGLE] = GPIO1_REG_TOGGLE, - }, - .map_base = RALINK_SOC_GPIO_BASE, - .map_size = PAGE_SIZE, -}; - -static struct ramips_gpio_chip ramips_gpio_chip2 = { - .chip = { - .label = "ramips-gpio2", - .base = 64, - .ngpio = RALINK_SOC_GPIO2_COUNT, - }, - .regs = { - [RAMIPS_GPIO_REG_INT] = GPIO2_REG_INT, - [RAMIPS_GPIO_REG_EDGE] = GPIO2_REG_EDGE, - [RAMIPS_GPIO_REG_RENA] = GPIO2_REG_RENA, - [RAMIPS_GPIO_REG_FENA] = GPIO2_REG_FENA, - [RAMIPS_GPIO_REG_DATA] = GPIO2_REG_DATA, - [RAMIPS_GPIO_REG_DIR] = GPIO2_REG_DIR, - [RAMIPS_GPIO_REG_POL] = GPIO2_REG_POL, - [RAMIPS_GPIO_REG_SET] = GPIO2_REG_SET, - [RAMIPS_GPIO_REG_RESET] = GPIO2_REG_RESET, - [RAMIPS_GPIO_REG_TOGGLE] = GPIO2_REG_TOGGLE, - }, - .map_base = RALINK_SOC_GPIO_BASE, - .map_size = PAGE_SIZE, -}; - static __init void ramips_gpio_chip_add(struct ramips_gpio_chip *rg) { spin_lock_init(&rg->lock); @@ -169,11 +103,12 @@ static __init void ramips_gpio_chip_add(struct ramips_gpio_chip *rg) gpiochip_add(&rg->chip); } -__init int ramips_gpio_init(void) +__init int ramips_gpio_init(struct ramips_gpio_data *data) { - ramips_gpio_chip_add(&ramips_gpio_chip0); - ramips_gpio_chip_add(&ramips_gpio_chip1); - ramips_gpio_chip_add(&ramips_gpio_chip2); + int i; + + for (i = 0; i < data->num_chips; i++) + ramips_gpio_chip_add(&data->chips[i]); return 0; } |