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| author | John Crispin <john@openwrt.org> | 2009-10-04 19:53:17 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2009-10-04 19:53:17 +0000 |
| commit | a70ef0c33764bc8cfc9f27403419a01a9dcebb78 (patch) | |
| tree | 640356f583a1060c4f67a74b47c83ec26029ce5e /target/linux/ramips/files/arch/mips/include/asm | |
| parent | a23e3e89853d1e3b31ab612ff9a03f86f2cb48b9 (diff) | |
| download | upstream-a70ef0c33764bc8cfc9f27403419a01a9dcebb78.tar.gz upstream-a70ef0c33764bc8cfc9f27403419a01a9dcebb78.tar.bz2 upstream-a70ef0c33764bc8cfc9f27403419a01a9dcebb78.zip | |
adds pci support for rt288x
SVN-Revision: 17855
Diffstat (limited to 'target/linux/ramips/files/arch/mips/include/asm')
| -rw-r--r-- | target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h new file mode 100644 index 0000000000..f73d7ac151 --- /dev/null +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_pci.h @@ -0,0 +1,19 @@ + +#ifdef CONFIG_PCI + +#define RT2880_PCI_SLOT1_BASE 0x20000000 +#define RALINK_PCI_BASE 0xA0440000 +#define RT2880_PCI_PCICFG_ADDR ((unsigned long*)(RALINK_PCI_BASE + 0x0000)) +#define RT2880_PCI_ARBCTL ((unsigned long*)(RALINK_PCI_BASE + 0x0080)) +#define RT2880_PCI_BAR0SETUP_ADDR ((unsigned long*)(RALINK_PCI_BASE + 0x0010)) +#define RT2880_PCI_CONFIG_ADDR ((unsigned long*)(RALINK_PCI_BASE + 0x0020)) +#define RT2880_PCI_CONFIG_DATA ((unsigned long*)(RALINK_PCI_BASE + 0x0024)) +#define RT2880_PCI_MEMBASE ((unsigned long*)(RALINK_PCI_BASE + 0x0028)) +#define RT2880_PCI_IOBASE ((unsigned long*)(RALINK_PCI_BASE + 0x002C)) +#define RT2880_PCI_IMBASEBAR0_ADDR ((unsigned long*)(RALINK_PCI_BASE + 0x0018)) +#define RT2880_PCI_ID ((unsigned long*)(RALINK_PCI_BASE + 0x0030)) +#define RT2880_PCI_CLASS ((unsigned long*)(RALINK_PCI_BASE + 0x0034)) +#define RT2880_PCI_SUBID ((unsigned long*)(RALINK_PCI_BASE + 0x0038)) +#define RT2880_PCI_PCIMSK_ADDR ((unsigned long*)(RALINK_PCI_BASE + 0x000C)) + +#endif |