diff options
| author | Rosen Penev <rosenp@gmail.com> | 2018-05-23 19:24:42 -0700 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2018-05-24 08:57:17 +0200 |
| commit | 048e41f6496697863cc7d73ab95fa89a6ddf2470 (patch) | |
| tree | d7fb76501c69390a9d22911028fe50e3a2b1fb17 /target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc | |
| parent | 7ac238fc9855d20f0cfbc5754a1f9591438abfe3 (diff) | |
| download | upstream-048e41f6496697863cc7d73ab95fa89a6ddf2470.tar.gz upstream-048e41f6496697863cc7d73ab95fa89a6ddf2470.tar.bz2 upstream-048e41f6496697863cc7d73ab95fa89a6ddf2470.zip | |
ramips: Add back some non-mt7621 code that staging removed
Staging is meant only for mt7621 but for OpenWrt more is needed.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Diffstat (limited to 'target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc')
| -rw-r--r-- | target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c b/target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c index 2a032fcba1..97ae927d2d 100644 --- a/target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c +++ b/target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c @@ -2209,7 +2209,23 @@ static int msdc_drv_probe(struct platform_device *pdev) // Set the pins for sdxc to sdxc mode //FIXME: this should be done by pinctl and not by the sd driver - reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3 << 18); + if (ralink_soc == MT762X_SOC_MT7620A || + ralink_soc == MT762X_SOC_MT7621AT) { + reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE + + 0x60)) & ~(0x3 << 18); + if (ralink_soc == MT762X_SOC_MT7620A) + reg |= 0x1 << 18; + } else { + reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE + 0x3c)); + reg |= 0x1e << 16; + sdr_write32((void __iomem *)(RALINK_SYSCTL_BASE + 0x3c), reg); + reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE + + 0x60)) & ~(0x3 << 10); +#if defined(CONFIG_MTK_MMC_EMMC_8BIT) + reg |= 0x3 << 26 | 0x3 << 28 | 0x3 << 30; +#endif + } + sdr_write32((void __iomem *)(RALINK_SYSCTL_BASE + 0x60), reg); hw = &msdc0_hw; |