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authorMark Ceeha <hi@shiz.me>2023-01-29 16:01:40 +0100
committerHauke Mehrtens <hauke@hauke-m.de>2023-02-03 12:13:50 +0100
commitd4c63c77866bf09668b541760b6c9f277b41ac87 (patch)
tree033201e5554169f5277c0e549de3e0ccea2a63a3 /target/linux/ramips/dts
parentc97bcec15a6f524089ffe17ad2435d107867da35 (diff)
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ramips: add support for TP-Link Deco M4R v4
This commit adds support for the V4 hardware revision of the Deco M4R. V4 is a complete overhaul of the hardware compared to V1 and V2, and is much more similar to the Archer C6 V3 and C6U V1. Specifications: SoC: MediaTek MT7621AT (2 cores at 880 MHz, 4 threads) RAM: Kingston D1216ECMDXGJD (256 MB) Wireless 2.4 GHz: MediaTek MT7603EN Wireless 5 GHz: MediaTek MT7613BEN Flash: 16 MB SPI NOR Installation: Flash the *-factory.bin image in the U-Boot recovery webserver. You can trigger this webserver by holding the reset button until the LED flashes yellow, or by hooking up to serial pads on the board (clearly labeled GND, RX and TX) and pressing `x` early in boot. Once the factory image has been flashed, you can use the regular upgrade procedure with sysupgrade images for subsequent flashes. Signed-off-by: Mark Ceeha <hi@shiz.me> Tested-by: Mark Ceeha <hi@shiz.me>
Diffstat (limited to 'target/linux/ramips/dts')
-rw-r--r--target/linux/ramips/dts/mt7621_tplink_deco-m4r-v4.dts203
1 files changed, 203 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7621_tplink_deco-m4r-v4.dts b/target/linux/ramips/dts/mt7621_tplink_deco-m4r-v4.dts
new file mode 100644
index 0000000000..3d17dbf599
--- /dev/null
+++ b/target/linux/ramips/dts/mt7621_tplink_deco-m4r-v4.dts
@@ -0,0 +1,203 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ compatible = "tplink,deco-m4r-v4", "mediatek,mt7621-soc";
+ model = "TP-Link Deco M4R v4";
+
+ aliases {
+ label-mac-device = &gmac0;
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_power;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ wps {
+ label = "wps";
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ linux,code = <KEY_WPS_BUTTON>;
+ };
+
+ led {
+ label = "led";
+ gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+ debounce_interval = <60>;
+ linux,code = <KEY_BRIGHTNESS_TOGGLE>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ rssi {
+ label = "green:rssi";
+ gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+ };
+
+ lan {
+ label = "green:lan";
+ gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+ };
+
+ sys {
+ label = "green:sys";
+ gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+ };
+
+ wifi2g {
+ label = "green:wifi2g";
+ gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy0tpt";
+ };
+
+ logo_red {
+ label = "red:logo";
+ gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+ /* match usage in v1 and v2 */
+ linux,default-trigger = "phy0tpt";
+ };
+
+ logo_blue {
+ label = "blue:logo";
+ gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+ /* match usage in v1 and v2 */
+ linux,default-trigger = "phy1tpt";
+
+ };
+
+ led_power: logo_green {
+ label = "green:logo";
+ gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
+ /* match usage in v1 and v2 */
+ default_state = "on";
+ };
+ };
+};
+
+&state_default {
+ gpio {
+ groups = "i2c", "uart2", "uart3", "jtag", "wdt";
+ function = "gpio";
+ };
+};
+
+&spi0 {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0 0x40000>;
+ read-only;
+ };
+
+ partition@40000 {
+ label = "firmware";
+ compatible = "denx,uimage";
+ reg = <0x40000 0xf60000>;
+ };
+
+ config: partition@fa0000 {
+ label = "config";
+ reg = <0xfa0000 0x010000>;
+ read-only;
+
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_config_8: macaddr@8 {
+ reg = <0x8 0x6>;
+ };
+ };
+
+ partition@fb0000 {
+ label = "tplink";
+ reg = <0xfb0000 0x040000>;
+ read-only;
+ };
+
+ radio: partition@ff0000 {
+ label = "radio";
+ reg = <0xff0000 0x10000>;
+ read-only;
+ };
+ };
+ };
+};
+
+&ethernet {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii1_pins &mdio_pins>;
+};
+
+&gmac0 {
+ nvmem-cells = <&macaddr_config_8>;
+ nvmem-cell-names = "mac-address";
+ label = "dsa";
+};
+
+&switch0 {
+ ports {
+ port@0 {
+ status = "okay";
+ label = "eth0";
+ };
+
+ port@1 {
+ status = "okay";
+ label = "eth1";
+ };
+ };
+};
+
+&pcie {
+ status = "okay";
+};
+
+&pcie0 {
+ wifi@0,0 {
+ compatible = "mediatek,mt76";
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&radio 0x0>;
+ ieee80211-freq-limit = <2400000 2500000>;
+ };
+};
+
+&pcie1 {
+ wifi@0,0 {
+ compatible = "mediatek,mt76";
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&radio 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ };
+};