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authorAdrian Schmutzler <freifunk@adrianschmutzler.de>2019-07-03 23:22:25 +0200
committerDaniel Golle <daniel@makrotopia.org>2019-07-10 17:36:29 +0200
commit48047b3a5c6aa9fff89a7a9c7ec76d8335b1a8e7 (patch)
tree6f48a2118b5ab45dcb88ab7dab0b18a6feccb619 /target/linux/ramips/dts/mt7620n_dlink_dwr-921-c1.dts
parent402138d12dca1a24d2837145c8d31c9d35769b9d (diff)
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ramips/mt7620: Name DTS files based on scheme
As introduced with ath79, DTS files for ramips will now be labelled soc_vendor_device.dts(i). With this change, DTS files can be selected automatically without further manual links. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/ramips/dts/mt7620n_dlink_dwr-921-c1.dts')
-rw-r--r--target/linux/ramips/dts/mt7620n_dlink_dwr-921-c1.dts152
1 files changed, 152 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7620n_dlink_dwr-921-c1.dts b/target/linux/ramips/dts/mt7620n_dlink_dwr-921-c1.dts
new file mode 100644
index 0000000000..92bcd54a42
--- /dev/null
+++ b/target/linux/ramips/dts/mt7620n_dlink_dwr-921-c1.dts
@@ -0,0 +1,152 @@
+/dts-v1/;
+
+#include "mt7620n.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ compatible = "dlink,dwr-921-c1", "ralink,mt7620n-soc";
+ model = "D-Link DWR-921 C1";
+
+ aliases {
+ led-boot = &led_sstrenghg;
+ led-failsafe = &led_sstrenghg;
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ poll-interval = <20>;
+
+ wps {
+ label = "wps";
+ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_WPS_BUTTON>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ sms {
+ label = "dwr-921-c1:green:sms";
+ gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+ };
+
+ lan {
+ label = "dwr-921-c1:green:lan";
+ gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
+ };
+
+ led_sstrenghg: sstrengthg {
+ label = "dwr-921-c1:green:sigstrength";
+ gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+ };
+
+ sstrengthr {
+ label = "dwr-921-c1:red:sigstrength";
+ gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+ };
+
+ 4g {
+ label = "dwr-921-c1:green:4g";
+ gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+ };
+
+ 3g {
+ label = "dwr-921-c1:green:3g";
+ gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
+ };
+
+ wifi {
+ label = "dwr-921-c1:green:wifi";
+ gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio_export {
+ compatible = "gpio-export";
+ #size-cells = <0>;
+
+ lte_modem_enable {
+ gpio-export,name = "lte_modem_enable";
+ gpio-export,output = <1>;
+ gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&gpio2 {
+ status = "okay";
+};
+
+&gpio3 {
+ status = "okay";
+};
+
+&spi0 {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "jboot";
+ reg = <0x0 0x10000>;
+ read-only;
+ };
+
+ partition@10000 {
+ compatible = "amit,jimage";
+ label = "firmware";
+ reg = <0x10000 0xfe0000>;
+ };
+
+ config: partition@ff0000 {
+ label = "config";
+ reg = <0xff0000 0x10000>;
+ read-only;
+ };
+ };
+ };
+};
+
+&ehci {
+ status = "okay";
+};
+
+&ohci {
+ status = "okay";
+};
+
+&ethernet {
+ port@4 {
+ status = "okay";
+ };
+};
+
+&pinctrl {
+ state_default: pinctrl0 {
+ default {
+ ralink,group = "spi refclk", "i2c", "ephy", "wled";
+ ralink,function = "gpio";
+ };
+ };
+};