ramips/mt7620: Name DTS files based on scheme

As introduced with ath79, DTS files for ramips will now be labelled
soc_vendor_device.dts(i). With this change, DTS files can be
selected automatically without further manual links.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>

1 files changed, 105 insertions, 0 deletions

diff --git a/target/linux/ramips/dts/mt7620a_hiwifi_hc5861.dts b/target/linux/ramips/dts/mt7620a_hiwifi_hc5861.dts
new file mode 100644
index 0000000000..73f1a4079a
--- /dev/null
+++ b/target/linux/ramips/dts/mt7620a_hiwifi_hc5861.dts
@@ -0,0 +1,105 @@
+/dts-v1/;
+
+#include "mt7620a_hiwifi_hc5x61.dtsi"
+
+/ {
+	compatible = "hiwifi,hc5861", "hiwifi,hc5x61", "ralink,mt7620a-soc";
+	model = "HiWiFi HC5861";
+
+	aliases {
+		led-boot = &led_system;
+		led-failsafe = &led_system;
+		led-running = &led_system;
+		led-upgrade = &led_system;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_system: system {
+			label = "hc5861:blue:system";
+			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2g {
+			label = "hc5861:blue:wlan2g";
+			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+		};
+
+		internet {
+			label = "hc5861:blue:internet";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan5g {
+			label = "hc5861:blue:wlan5g";
+			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+		};
+
+		turbo {
+			label = "hc5861:blue:turbo";
+			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio_export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		usbpower {
+			gpio-export,name = "usbpower";
+			gpio-export,output = <0>;
+			gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+		};
+
+		sdpower {
+			gpio-export,name = "sdpower";
+			gpio-export,output = <0>;
+			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&ehci {
+	status = "okay";
+};
+
+&ohci {
+	status = "okay";
+};
+
+&ethernet {
+	status = "okay";
+	mtd-mac-address = <&factory 0x4>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii1_pins &mdio_pins>;
+	mediatek,portmap = "wllll";
+
+	port@5 {
+		status = "okay";
+		phy-handle = <&phy5>;
+		phy-mode = "rgmii";
+	};
+
+	mdio-bus {
+		status = "okay";
+
+		phy5: ethernet-phy@5 {
+			reg = <5>;
+			phy-mode = "rgmii";
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	wifi@0,0 {
+		compatible = "pci14c3,7662";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};