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| author | Imre Kaloz <kaloz@openwrt.org> | 2015-03-19 10:25:44 +0000 |
|---|---|---|
| committer | Imre Kaloz <kaloz@openwrt.org> | 2015-03-19 10:25:44 +0000 |
| commit | e3d19988cfe87cee8633c5729291ab7110a95075 (patch) | |
| tree | 7de35fe5bc9f216f1d3a8b9b5e457fc803c535d1 /target/linux/mvebu/patches-4.0/022-ARM-mvebu-A385-AP-Enable-the-NAND-controller.patch | |
| parent | 05bf6e0f2ea2988920dd6c4463659e1cd7df7ccf (diff) | |
| download | upstream-e3d19988cfe87cee8633c5729291ab7110a95075.tar.gz upstream-e3d19988cfe87cee8633c5729291ab7110a95075.tar.bz2 upstream-e3d19988cfe87cee8633c5729291ab7110a95075.zip | |
mvebu: add Linux 4.0 support
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
SVN-Revision: 44882
Diffstat (limited to 'target/linux/mvebu/patches-4.0/022-ARM-mvebu-A385-AP-Enable-the-NAND-controller.patch')
| -rw-r--r-- | target/linux/mvebu/patches-4.0/022-ARM-mvebu-A385-AP-Enable-the-NAND-controller.patch | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-4.0/022-ARM-mvebu-A385-AP-Enable-the-NAND-controller.patch b/target/linux/mvebu/patches-4.0/022-ARM-mvebu-A385-AP-Enable-the-NAND-controller.patch new file mode 100644 index 0000000000..3c4a111e4a --- /dev/null +++ b/target/linux/mvebu/patches-4.0/022-ARM-mvebu-A385-AP-Enable-the-NAND-controller.patch @@ -0,0 +1,34 @@ +From 7eb1f09ec8e25aa2fc3f6fc5fc9405d9f917d503 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard <maxime.ripard@free-electrons.com> +Date: Thu, 11 Dec 2014 14:14:58 +0100 +Subject: [PATCH 1/2] ARM: mvebu: A385-AP: Enable the NAND controller + +The A385 AP has a 1GB NAND chip. Enable it. + +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> +--- + arch/arm/boot/dts/armada-385-db-ap.dts | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/arch/arm/boot/dts/armada-385-db-ap.dts ++++ b/arch/arm/boot/dts/armada-385-db-ap.dts +@@ -150,6 +150,19 @@ + phy = <&phy0>; + phy-mode = "rgmii-id"; + }; ++ ++ nfc: flash@d0000 { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ num-cs = <1>; ++ nand-ecc-strength = <4>; ++ nand-ecc-step-size = <512>; ++ marvell,nand-keep-config; ++ marvell,nand-enable-arbiter; ++ nand-on-flash-bbt; ++ }; + }; + + pcie-controller { |