mpc85xx: add support for Enterasys WS-AP3710i

Hardware
--------

SoC:   NXP P1020 (2x e500 @ 800MHz)
RAM:   256M DDR3 (Micron)
FLASH: 32M NOR (Spansion S29GL128S)
BTN:   1x Reset
WiFi:  1x Atheros AR9590 2.4 bgn 3x3
       2x Atheros AR9590 5.0 an 3x3
ETH:   1x Gigabit Ethernet (Atheros AR8033)
LED:   System (green/red) - Radio{0,1} (green)
       LAN (connected to PHY)
        - GE blue
        - FE green

Serial is a Cisco-compatible RJ45 next to the ethernet port.
115200-N-8 are the settings for OS and U-Boot.

Installation
------------

1. Grab the OpenWrt initramfs, rename it to 01C8A8C0.img. Place it in
   the root directory of a TFTP server and serve it at
   192.168.200.200/24.

2. Connect to the serial port and boot the AP. Stop autoboot in U-Boot
   by pressing Enter when prompted. Credentials are identical to the one
   in the APs interface. By default it is admin / new2day.

3. Set the bootcmd so the AP can boot OpenWrt by executing

   $ setenv boot_openwrt "setenv bootargs;
     cp.b 0xee000000 0x1000000 0x1000000; bootm 0x1000000"
   $ setenv bootcmd "run boot_openwrt"
   $ saveenv

   If you plan on going back to the vendor firmware - the bootcmd for it
   is stored in the boot_flash variable.

4. Load the initramfs image to RAM and boot by executing

   $ tftpboot 0x1000000 192.168.200.200:01C8A8C0.img; bootm

5. Make a backup of the "firmware" partition if you ever wish to go back
   to the vendor firmware.

6. Upload the OpenWrt sysupgrade image via SCP to the devices /tmp
   folder.

7. Flash OpenWrt using sysupgrade.

   $ sysupgrade -n /tmp/openwrt-sysupgrade.bin

Signed-off-by: David Bauer <mail@david-bauer.net>

1 files changed, 172 insertions, 0 deletions

diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3710i.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3710i.dts
new file mode 100644
index 0000000000..ebaac417eb
--- /dev/null
+++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3710i.dts
@@ -0,0 +1,172 @@
+// SPDX-License-Identifier: GPL-2.0-or-later or MIT
+
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+	model = "Enterasys WS-AP3710i";
+	compatible = "enterasys,ws-ap3710i";
+
+	aliases {
+		led-boot = &led_power_green;
+		led-failsafe = &led_power_red;
+		led-running = &led_power_green;
+		led-upgrade = &led_power_red;
+		label-mac-device = &enet0;
+	};
+
+	memory {
+		device_type = "memory";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		wifi1 {
+			gpios = <&gpio0 3 0>;
+			label = "ws-ap3710i:green:radio1";
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wifi2 {
+			gpios = <&gpio0 4 0>;
+			label = "ws-ap3710i:green:radio2";
+			linux,default-trigger = "phy1tpt";
+		};
+
+		led_power_green: power_green {
+			gpios = <&gpio0 8 0>;
+			label = "ws-ap3710i:green:power";
+		};
+
+		led_power_red: power_red {
+			gpios = <&gpio0 9 0>;
+			label = "ws-ap3710i:red:power";
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "Reset button";
+			gpios = <&gpio0 1 1>; /* active low */
+			linux,code = <0x198>; /* KEY_RESTART */
+		};
+	};
+
+	lbc: localbus@ffe05000 {
+		reg = <0 0xffe05000 0 0x1000>;
+		ranges = <0x0 0x0 0x0 0xee000000 0x2000000>;
+
+		nor@0,0 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "cfi-flash";
+			reg = <0x0 0x0 0x2000000>;
+			bank-width = <2>;
+			device-width = <1>;
+
+			partitions {
+				compatible = "fixed-partitions";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partition@0 {
+					compatible = "denx,fit";
+					reg = <0x0 0x1d80000>;
+					label = "firmware";
+				};
+
+				partition@1d80000 {
+					reg = <0x1d80000 0x80000>;
+					label = "u-boot";
+					read-only;
+				};
+
+				partition@1e00000 {
+					reg = <0x1e00000 0x100000>;
+					label = "nvram";
+					read-only;
+				};
+
+				partition@1f00000 {
+					reg = <0x1f00000 0x20000>;
+					label = "cfg2";
+					read-only;
+				};
+
+				partition@1f20000 {
+					reg = <0x1f20000 0x20000>;
+					label = "cfg1";
+					read-only;
+				};
+			};
+		};
+	};
+
+	soc: soc@ffe00000 {
+		ranges = <0x0 0x0 0xffe00000 0x100000>;
+
+		gpio0: gpio-controller@fc00 {
+		};
+
+		mdio@24000 {
+			phy4: ethernet-phy@4 {
+				reg = <0x4>;
+				reset-gpios = <&gpio0 2 1>;
+			};
+		};
+
+		enet0: ethernet@b0000 {
+			phy-connection-type = "rgmii-id";
+			phy-handle = <&phy4>;
+		};
+
+		enet1: ethernet@b1000 {
+			status = "disabled";
+		};
+
+		enet2: ethernet@b2000 {
+			status = "disabled";
+		};
+
+		usb@22000 {
+			status = "disabled";
+		};
+
+		usb@23000 {
+			status = "disabled";
+		};
+	};
+
+	pci0: pcie@ffe09000 {
+		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+		reg = <0 0xffe09000 0 0x1000>;
+		pcie@0 {
+			ranges = <0x2000000 0x0 0xa0000000
+				  0x2000000 0x0 0xa0000000
+				  0x0 0x20000000
+
+				  0x1000000 0x0 0x0
+				  0x1000000 0x0 0x0
+				  0x0 0x100000>;
+		};
+	};
+
+	pci1: pcie@ffe0a000 {
+		reg = <0 0xffe0a000 0 0x1000>;
+		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+		pcie@0 {
+			ranges = <0x2000000 0x0 0x80000000
+				  0x2000000 0x0 0x80000000
+				  0x0 0x20000000
+
+				  0x1000000 0x0 0x0
+				  0x1000000 0x0 0x0
+				  0x0 0x100000>;
+		};
+	};
+
+};
+/include/ "fsl/p1020si-post.dtsi"