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author | Jason A. Donenfeld <Jason@zx2c4.com> | 2021-03-04 13:37:13 -0700 |
---|---|---|
committer | Petr Štetiar <ynezz@true.cz> | 2021-03-04 22:06:53 +0100 |
commit | 196f3d586f11d96ba4ab60068cfb12420bcd20fd (patch) | |
tree | 4f4eb9cd8c8a229972792286361b5bff8743d993 /target/linux/mediatek/patches-5.4/1012-pci-pcie-mediatek-add-support-for-coherent-DMA.patch | |
parent | 1d412235a57f3359d1c7bb63bfebce50c56caee6 (diff) | |
download | upstream-196f3d586f11d96ba4ab60068cfb12420bcd20fd.tar.gz upstream-196f3d586f11d96ba4ab60068cfb12420bcd20fd.tar.bz2 upstream-196f3d586f11d96ba4ab60068cfb12420bcd20fd.zip |
kernel-5.4: bump to 5.4.102 and refresh patches
5.4.102 backported a lot of stuff that our WireGuard backport already
did, in addition to other patches we had, so those patches were
removed from that part of the series. In the process other patches were
refreshed or reworked to account for upstream changes.
This commit involved `update_kernel.sh -v -u 5.4`.
Cc: John Audia <graysky@archlinux.us>
Cc: David Bauer <mail@david-bauer.net>
Cc: Petr Štetiar <ynezz@true.cz>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Diffstat (limited to 'target/linux/mediatek/patches-5.4/1012-pci-pcie-mediatek-add-support-for-coherent-DMA.patch')
-rw-r--r-- | target/linux/mediatek/patches-5.4/1012-pci-pcie-mediatek-add-support-for-coherent-DMA.patch | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/target/linux/mediatek/patches-5.4/1012-pci-pcie-mediatek-add-support-for-coherent-DMA.patch b/target/linux/mediatek/patches-5.4/1012-pci-pcie-mediatek-add-support-for-coherent-DMA.patch index c24126284b..20a67676e3 100644 --- a/target/linux/mediatek/patches-5.4/1012-pci-pcie-mediatek-add-support-for-coherent-DMA.patch +++ b/target/linux/mediatek/patches-5.4/1012-pci-pcie-mediatek-add-support-for-coherent-DMA.patch @@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name> --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi -@@ -803,6 +803,8 @@ +@@ -805,6 +805,8 @@ reg = <0 0x1a143000 0 0x1000>; reg-names = "port0"; mediatek,pcie-cfg = <&pciecfg>; @@ -19,7 +19,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name> #address-cells = <3>; #size-cells = <2>; interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_LOW>; -@@ -820,6 +822,7 @@ +@@ -822,6 +824,7 @@ bus-range = <0x00 0xff>; ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x8000000>; status = "disabled"; @@ -27,7 +27,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name> slot0: pcie@0,0 { reg = <0x0000 0 0 0 0>; -@@ -846,6 +849,8 @@ +@@ -848,6 +851,8 @@ reg = <0 0x1a145000 0 0x1000>; reg-names = "port1"; mediatek,pcie-cfg = <&pciecfg>; @@ -36,7 +36,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name> #address-cells = <3>; #size-cells = <2>; interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_LOW>; -@@ -864,6 +869,7 @@ +@@ -866,6 +871,7 @@ bus-range = <0x00 0xff>; ranges = <0x82000000 0 0x28000000 0x0 0x28000000 0 0x8000000>; status = "disabled"; @@ -44,7 +44,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name> slot1: pcie@1,0 { reg = <0x0800 0 0 0 0>; -@@ -923,6 +929,11 @@ +@@ -925,6 +931,11 @@ }; }; |