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author | Daniel Golle <daniel@makrotopia.org> | 2023-04-30 18:03:00 +0100 |
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committer | Daniel Golle <daniel@makrotopia.org> | 2023-05-24 19:26:52 +0100 |
commit | 670dedbbd71056fa60666a6c5f7bd84ebcf6a2a1 (patch) | |
tree | 42527bc0b5f167424f084c34422f207c960deaca /target/linux/mediatek/patches-5.15/350-01-cpufreq-mediatek-Cleanup-variables-and-error-handlin.patch | |
parent | fd1791795195cec46b86900ff3e228c080c8bf20 (diff) | |
download | upstream-670dedbbd71056fa60666a6c5f7bd84ebcf6a2a1.tar.gz upstream-670dedbbd71056fa60666a6c5f7bd84ebcf6a2a1.tar.bz2 upstream-670dedbbd71056fa60666a6c5f7bd84ebcf6a2a1.zip |
mediatek: backport cpufreq changes to support MT7988
Backport cpufreq changes from upstream so that the MediaTek MT7988 SoC
can be supported.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit e4555d69a1c7c811188d8e257e77ac917d15f492)
Diffstat (limited to 'target/linux/mediatek/patches-5.15/350-01-cpufreq-mediatek-Cleanup-variables-and-error-handlin.patch')
-rw-r--r-- | target/linux/mediatek/patches-5.15/350-01-cpufreq-mediatek-Cleanup-variables-and-error-handlin.patch | 166 |
1 files changed, 166 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-5.15/350-01-cpufreq-mediatek-Cleanup-variables-and-error-handlin.patch b/target/linux/mediatek/patches-5.15/350-01-cpufreq-mediatek-Cleanup-variables-and-error-handlin.patch new file mode 100644 index 0000000000..8fad64a570 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/350-01-cpufreq-mediatek-Cleanup-variables-and-error-handlin.patch @@ -0,0 +1,166 @@ +From 7a768326fdba542144833b9198a6d0edab52fad2 Mon Sep 17 00:00:00 2001 +From: Jia-Wei Chang <jia-wei.chang@mediatek.com> +Date: Fri, 8 Apr 2022 12:58:56 +0800 +Subject: [PATCH 01/21] cpufreq: mediatek: Cleanup variables and error handling + in mtk_cpu_dvfs_info_init() + +- Remove several unnecessary varaibles in mtk_cpu_dvfs_info_init(). +- Unify error message format and use dev_err_probe() if possible. + +Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.com> +Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> +Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> +Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> +--- + drivers/cpufreq/mediatek-cpufreq.c | 89 ++++++++++++------------------ + 1 file changed, 34 insertions(+), 55 deletions(-) + +--- a/drivers/cpufreq/mediatek-cpufreq.c ++++ b/drivers/cpufreq/mediatek-cpufreq.c +@@ -302,96 +302,75 @@ static int mtk_cpufreq_set_target(struct + static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) + { + struct device *cpu_dev; +- struct regulator *proc_reg = ERR_PTR(-ENODEV); +- struct regulator *sram_reg = ERR_PTR(-ENODEV); +- struct clk *cpu_clk = ERR_PTR(-ENODEV); +- struct clk *inter_clk = ERR_PTR(-ENODEV); + struct dev_pm_opp *opp; + unsigned long rate; + int ret; + + cpu_dev = get_cpu_device(cpu); + if (!cpu_dev) { +- pr_err("failed to get cpu%d device\n", cpu); ++ dev_err(cpu_dev, "failed to get cpu%d device\n", cpu); + return -ENODEV; + } ++ info->cpu_dev = cpu_dev; + +- cpu_clk = clk_get(cpu_dev, "cpu"); +- if (IS_ERR(cpu_clk)) { +- if (PTR_ERR(cpu_clk) == -EPROBE_DEFER) +- pr_warn("cpu clk for cpu%d not ready, retry.\n", cpu); +- else +- pr_err("failed to get cpu clk for cpu%d\n", cpu); +- +- ret = PTR_ERR(cpu_clk); +- return ret; +- } +- +- inter_clk = clk_get(cpu_dev, "intermediate"); +- if (IS_ERR(inter_clk)) { +- if (PTR_ERR(inter_clk) == -EPROBE_DEFER) +- pr_warn("intermediate clk for cpu%d not ready, retry.\n", +- cpu); +- else +- pr_err("failed to get intermediate clk for cpu%d\n", +- cpu); ++ info->cpu_clk = clk_get(cpu_dev, "cpu"); ++ if (IS_ERR(info->cpu_clk)) { ++ ret = PTR_ERR(info->cpu_clk); ++ return dev_err_probe(cpu_dev, ret, ++ "cpu%d: failed to get cpu clk\n", cpu); ++ } + +- ret = PTR_ERR(inter_clk); ++ info->inter_clk = clk_get(cpu_dev, "intermediate"); ++ if (IS_ERR(info->inter_clk)) { ++ ret = PTR_ERR(info->inter_clk); ++ dev_err_probe(cpu_dev, ret, ++ "cpu%d: failed to get intermediate clk\n", cpu); + goto out_free_resources; + } + +- proc_reg = regulator_get_optional(cpu_dev, "proc"); +- if (IS_ERR(proc_reg)) { +- if (PTR_ERR(proc_reg) == -EPROBE_DEFER) +- pr_warn("proc regulator for cpu%d not ready, retry.\n", +- cpu); +- else +- pr_err("failed to get proc regulator for cpu%d\n", +- cpu); +- +- ret = PTR_ERR(proc_reg); ++ info->proc_reg = regulator_get_optional(cpu_dev, "proc"); ++ if (IS_ERR(info->proc_reg)) { ++ ret = PTR_ERR(info->proc_reg); ++ dev_err_probe(cpu_dev, ret, ++ "cpu%d: failed to get proc regulator\n", cpu); + goto out_free_resources; + } + + /* Both presence and absence of sram regulator are valid cases. */ +- sram_reg = regulator_get_exclusive(cpu_dev, "sram"); ++ info->sram_reg = regulator_get_exclusive(cpu_dev, "sram"); ++ if (IS_ERR(info->sram_reg)) ++ info->sram_reg = NULL; + + /* Get OPP-sharing information from "operating-points-v2" bindings */ + ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, &info->cpus); + if (ret) { +- pr_err("failed to get OPP-sharing information for cpu%d\n", +- cpu); ++ dev_err(cpu_dev, ++ "cpu%d: failed to get OPP-sharing information\n", cpu); + goto out_free_resources; + } + + ret = dev_pm_opp_of_cpumask_add_table(&info->cpus); + if (ret) { +- pr_warn("no OPP table for cpu%d\n", cpu); ++ dev_warn(cpu_dev, "cpu%d: no OPP table\n", cpu); + goto out_free_resources; + } + + /* Search a safe voltage for intermediate frequency. */ +- rate = clk_get_rate(inter_clk); ++ rate = clk_get_rate(info->inter_clk); + opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate); + if (IS_ERR(opp)) { +- pr_err("failed to get intermediate opp for cpu%d\n", cpu); ++ dev_err(cpu_dev, "cpu%d: failed to get intermediate opp\n", cpu); + ret = PTR_ERR(opp); + goto out_free_opp_table; + } + info->intermediate_voltage = dev_pm_opp_get_voltage(opp); + dev_pm_opp_put(opp); + +- info->cpu_dev = cpu_dev; +- info->proc_reg = proc_reg; +- info->sram_reg = IS_ERR(sram_reg) ? NULL : sram_reg; +- info->cpu_clk = cpu_clk; +- info->inter_clk = inter_clk; +- + /* + * If SRAM regulator is present, software "voltage tracking" is needed + * for this CPU power domain. + */ +- info->need_voltage_tracking = !IS_ERR(sram_reg); ++ info->need_voltage_tracking = (info->sram_reg != NULL); + + return 0; + +@@ -399,14 +378,14 @@ out_free_opp_table: + dev_pm_opp_of_cpumask_remove_table(&info->cpus); + + out_free_resources: +- if (!IS_ERR(proc_reg)) +- regulator_put(proc_reg); +- if (!IS_ERR(sram_reg)) +- regulator_put(sram_reg); +- if (!IS_ERR(cpu_clk)) +- clk_put(cpu_clk); +- if (!IS_ERR(inter_clk)) +- clk_put(inter_clk); ++ if (!IS_ERR(info->proc_reg)) ++ regulator_put(info->proc_reg); ++ if (!IS_ERR(info->sram_reg)) ++ regulator_put(info->sram_reg); ++ if (!IS_ERR(info->cpu_clk)) ++ clk_put(info->cpu_clk); ++ if (!IS_ERR(info->inter_clk)) ++ clk_put(info->inter_clk); + + return ret; + } |