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author | John Crispin <john@phrozen.org> | 2018-05-07 12:07:32 +0200 |
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committer | John Crispin <john@phrozen.org> | 2018-06-18 21:21:53 +0200 |
commit | da8fc1511fc83f6ba2cf0e1e1feadbe1b9b58f4d (patch) | |
tree | c8093d2f8d65636ed5a6e9b89fb68844b5ffdbc8 /target/linux/mediatek/patches-4.14/0152-mmc-mediatek-make-hs400_tune_response-only-for-mt817.patch | |
parent | 763c0473c8137b236b6d7504b1c6df3d48f90ea4 (diff) | |
download | upstream-da8fc1511fc83f6ba2cf0e1e1feadbe1b9b58f4d.tar.gz upstream-da8fc1511fc83f6ba2cf0e1e1feadbe1b9b58f4d.tar.bz2 upstream-da8fc1511fc83f6ba2cf0e1e1feadbe1b9b58f4d.zip |
mediatek: backport upstream mediatek patches
Signed-off-by: John Crispin <john@phrozen.org>
(cherry picked from commit 050da2107a7eb2a571a8a3d0cee21cc6a44b72b8)
Diffstat (limited to 'target/linux/mediatek/patches-4.14/0152-mmc-mediatek-make-hs400_tune_response-only-for-mt817.patch')
-rw-r--r-- | target/linux/mediatek/patches-4.14/0152-mmc-mediatek-make-hs400_tune_response-only-for-mt817.patch | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-4.14/0152-mmc-mediatek-make-hs400_tune_response-only-for-mt817.patch b/target/linux/mediatek/patches-4.14/0152-mmc-mediatek-make-hs400_tune_response-only-for-mt817.patch new file mode 100644 index 0000000000..3c665dc317 --- /dev/null +++ b/target/linux/mediatek/patches-4.14/0152-mmc-mediatek-make-hs400_tune_response-only-for-mt817.patch @@ -0,0 +1,75 @@ +From bc70c7f1174b937af2784977281a1567f69dd2b6 Mon Sep 17 00:00:00 2001 +From: Chaotian Jing <chaotian.jing@mediatek.com> +Date: Mon, 16 Oct 2017 09:46:31 +0800 +Subject: [PATCH 152/224] mmc: mediatek: make hs400_tune_response only for + mt8173 + +the origin design of hs400_tune_response is for mt8173 because of +mt8173 has a special design. for doing that, we add a new member +"compatible", by now it's only for mt8173. + +Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> +Tested-by: Sean Wang <sean.wang@mediatek.com> +Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> +--- + drivers/mmc/host/mtk-sd.c | 11 +++++++++-- + 1 file changed, 9 insertions(+), 2 deletions(-) + +diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c +index 643c795f1bdd..ab2fbbbdfda3 100644 +--- a/drivers/mmc/host/mtk-sd.c ++++ b/drivers/mmc/host/mtk-sd.c +@@ -300,6 +300,7 @@ struct msdc_save_para { + + struct mtk_mmc_compatible { + u8 clk_div_bits; ++ bool hs400_tune; /* only used for MT8173 */ + }; + + struct msdc_tune_para { +@@ -360,18 +361,22 @@ struct msdc_host { + + static const struct mtk_mmc_compatible mt8135_compat = { + .clk_div_bits = 8, ++ .hs400_tune = false, + }; + + static const struct mtk_mmc_compatible mt8173_compat = { + .clk_div_bits = 8, ++ .hs400_tune = true, + }; + + static const struct mtk_mmc_compatible mt2701_compat = { + .clk_div_bits = 12, ++ .hs400_tune = false, + }; + + static const struct mtk_mmc_compatible mt2712_compat = { + .clk_div_bits = 12, ++ .hs400_tune = false, + }; + + static const struct of_device_id msdc_of_ids[] = { +@@ -666,7 +671,8 @@ static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz) + host->base + PAD_CMD_TUNE); + } + +- if (timing == MMC_TIMING_MMC_HS400) ++ if (timing == MMC_TIMING_MMC_HS400 && ++ host->dev_comp->hs400_tune) + sdr_set_field(host->base + PAD_CMD_TUNE, + MSDC_PAD_TUNE_CMDRRDLY, + host->hs400_cmd_int_delay); +@@ -1594,7 +1600,8 @@ static int msdc_execute_tuning(struct mmc_host *mmc, u32 opcode) + struct msdc_host *host = mmc_priv(mmc); + int ret; + +- if (host->hs400_mode) ++ if (host->hs400_mode && ++ host->dev_comp->hs400_tune) + ret = hs400_tune_response(mmc, opcode); + else + ret = msdc_tune_response(mmc, opcode); +-- +2.11.0 + |