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| author | Daniel Golle <daniel@makrotopia.org> | 2022-08-29 08:54:41 +0200 |
|---|---|---|
| committer | Daniel Golle <daniel@makrotopia.org> | 2022-09-22 23:55:02 +0100 |
| commit | c93c5365c0eb78ba8b479a9fe0cc5ec96f773978 (patch) | |
| tree | b250435d0f0e8e66c56d0486d1151d4eb1fc827e /target/linux/mediatek/files-5.15/arch | |
| parent | 524f52a471495d2c4e764539e000cb699610de1f (diff) | |
| download | upstream-c93c5365c0eb78ba8b479a9fe0cc5ec96f773978.tar.gz upstream-c93c5365c0eb78ba8b479a9fe0cc5ec96f773978.tar.bz2 upstream-c93c5365c0eb78ba8b479a9fe0cc5ec96f773978.zip | |
kernel: pick patches for MediaTek Ethernet from linux-next
Pick patches with several fixes and improvements, preparation for
upcoming WED (TX) [1] as well as basic XDP support [2] with MediaTek's
Filogic SoCs to the mtk_eth_soc driver.
Also pick follow-up patch fixing Ethernet on MT7621 [3].
Tested on Bananapi BPi-R3 (MT7986), Bananapi BPi-R64 (MT7622),
Bananapi BPi-R2 (MT7623), MikroTik RouterBoard M11G (MT7621).
[1]: https://patchwork.kernel.org/project/netdevbpf/list/?series=662108&state=*
[2]: https://patchwork.kernel.org/project/netdevbpf/list/?series=675368&state=*
(the first part of the series adding wed nodes to mt7986a.dtsi was
applied to the copy of mt7986a.dtsi in our tree)
[3]: https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git/commit/?id=5e69163d3b9931098922b3fc2f8e786af8c1f37e
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Diffstat (limited to 'target/linux/mediatek/files-5.15/arch')
| -rw-r--r-- | target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 17adda1554..601c859617 100644 --- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -397,6 +397,28 @@ #reset-cells = <1>; }; + wed_pcie: wed-pcie@10003000 { + compatible = "mediatek,mt7986-wed-pcie", + "syscon"; + reg = <0 0x10003000 0 0x10>; + }; + + wed0: wed@15010000 { + compatible = "mediatek,mt7986-wed", + "syscon"; + reg = <0 0x15010000 0 0x1000>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; + }; + + wed1: wed@15011000 { + compatible = "mediatek,mt7986-wed", + "syscon"; + reg = <0 0x15011000 0 0x1000>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>; + }; + eth: ethernet@15100000 { compatible = "mediatek,mt7986-eth"; reg = <0 0x15100000 0 0x80000>; @@ -431,6 +453,8 @@ <&apmixedsys CLK_APMIXED_SGMPLL>; mediatek,ethsys = <ðsys>; mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>; + mediatek,wed-pcie = <&wed_pcie>; + mediatek,wed = <&wed0>, <&wed1>; #reset-cells = <1>; #address-cells = <1>; #size-cells = <0>; |