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| author | Gabor Juhos <juhosg@openwrt.org> | 2012-04-21 12:30:47 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2012-04-21 12:30:47 +0000 |
| commit | 3080f60ee8d518b5cd67d2c12886f808bdd0a94a (patch) | |
| tree | b2144c8f898890a85771465e7757335fb59df8cf /target/linux/malta/be | |
| parent | 5a5d52784e649fc5d5f1a094218a99fbf36f18c6 (diff) | |
| download | upstream-3080f60ee8d518b5cd67d2c12886f808bdd0a94a.tar.gz upstream-3080f60ee8d518b5cd67d2c12886f808bdd0a94a.tar.bz2 upstream-3080f60ee8d518b5cd67d2c12886f808bdd0a94a.zip | |
ramips: rt305x: fix CPU clock detection on RT3352
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31401 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/malta/be')
0 files changed, 0 insertions, 0 deletions