layerscape: add patches-5.4

Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/

For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.

The patches are sorted into the following categories:
  301-arch-xxxx
  302-dts-xxxx
  303-core-xxxx
  701-net-xxxx
  801-audio-xxxx
  802-can-xxxx
  803-clock-xxxx
  804-crypto-xxxx
  805-display-xxxx
  806-dma-xxxx
  807-gpio-xxxx
  808-i2c-xxxx
  809-jailhouse-xxxx
  810-keys-xxxx
  811-kvm-xxxx
  812-pcie-xxxx
  813-pm-xxxx
  814-qe-xxxx
  815-sata-xxxx
  816-sdhc-xxxx
  817-spi-xxxx
  818-thermal-xxxx
  819-uart-xxxx
  820-usb-xxxx
  821-vfio-xxxx

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>

1 files changed, 138 insertions, 0 deletions

diff --git a/target/linux/layerscape/patches-5.4/701-net-0202-dpaa2-eth-Keep-congestion-group-taildrop-enabled-whe.patch b/target/linux/layerscape/patches-5.4/701-net-0202-dpaa2-eth-Keep-congestion-group-taildrop-enabled-whe.patch
new file mode 100644
index 0000000000..513fcc4b2a
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/701-net-0202-dpaa2-eth-Keep-congestion-group-taildrop-enabled-whe.patch
@@ -0,0 +1,138 @@
+From b58fa682dceaee9e2576f9ba3f36942c650414ae Mon Sep 17 00:00:00 2001
+From: Ioana Radulescu <ruxandra.radulescu@nxp.com>
+Date: Tue, 17 Sep 2019 21:14:04 +0300
+Subject: [PATCH] dpaa2-eth: Keep congestion group taildrop enabled when PFC on
+
+Leave congestion group taildrop enabled for all traffic classes
+when PFC is enabled. Notification threshold is low enough such
+that it will be hit first and this also ensures that FQs on
+traffic classes which are not PFC enabled won't drain the buffer
+pool.
+
+FQ taildrop threshold is kept disabled as long as any form of
+flow control is on. Since FQ taildrop works with bytes, not number
+of frames, we can't guarantee it will not interfere with the
+congestion notification mechanism for all frame sizes.
+
+Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
+---
+ drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c | 35 ++++++++++++++++++------
+ drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h |  4 ++-
+ 2 files changed, 30 insertions(+), 9 deletions(-)
+
+--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
++++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
+@@ -1229,17 +1229,21 @@ static void disable_ch_napi(struct dpaa2
+ }
+ 
+ static void dpaa2_eth_set_rx_taildrop(struct dpaa2_eth_priv *priv,
+-				      bool tx_pause)
++				      bool tx_pause, bool pfc)
+ {
+ 	struct dpni_taildrop td = {0};
+ 	struct dpaa2_eth_fq *fq;
+ 	int i, err;
+ 
++	/* FQ taildrop: threshold is in bytes, per frame queue. Enabled if
++	 * flow control is disabled (as it might interfere with either the
++	 * buffer pool depletion trigger for pause frames or with the group
++	 * congestion trigger for PFC frames)
++	 */
+ 	td.enable = !tx_pause;
+-	if (priv->rx_td_enabled == td.enable)
+-		return;
++	if (priv->rx_fqtd_enabled == td.enable)
++		goto set_cgtd;
+ 
+-	/* FQ taildrop: thrshold is in bytes, per frame queue */
+ 	td.threshold = DPAA2_ETH_FQ_TAILDROP_THRESH;
+ 	td.units = DPNI_CONGESTION_UNIT_BYTES;
+ 
+@@ -1257,9 +1261,20 @@ static void dpaa2_eth_set_rx_taildrop(st
+ 		}
+ 	}
+ 
++	priv->rx_fqtd_enabled = td.enable;
++
++set_cgtd:
+ 	/* Congestion group taildrop: threshold is in frames, per group
+ 	 * of FQs belonging to the same traffic class
++	 * Enabled if general Tx pause disabled or if PFCs are enabled
++	 * (congestion group threhsold for PFC generation is lower than the
++	 * CG taildrop threshold, so it won't interfere with it; we also
++	 * want frames in non-PFC enabled traffic classes to be kept in check)
+ 	 */
++	td.enable = !tx_pause || (tx_pause && pfc);
++	if (priv->rx_cgtd_enabled == td.enable)
++		return;
++
+ 	td.threshold = DPAA2_ETH_CG_TAILDROP_THRESH(priv);
+ 	td.units = DPNI_CONGESTION_UNIT_FRAMES;
+ 	for (i = 0; i < dpaa2_eth_tc_count(priv); i++) {
+@@ -1273,7 +1288,7 @@ static void dpaa2_eth_set_rx_taildrop(st
+ 		}
+ 	}
+ 
+-	priv->rx_td_enabled = td.enable;
++	priv->rx_cgtd_enabled = td.enable;
+ }
+ 
+ static void update_tx_fqids(struct dpaa2_eth_priv *priv);
+@@ -1296,7 +1311,7 @@ static int link_state_update(struct dpaa
+ 	 * only when pause frame generation is disabled.
+ 	 */
+ 	tx_pause = dpaa2_eth_tx_pause_enabled(state.options);
+-	dpaa2_eth_set_rx_taildrop(priv, tx_pause);
++	dpaa2_eth_set_rx_taildrop(priv, tx_pause, priv->pfc_enabled);
+ 
+ 	/* Chech link state; speed / duplex changes are not treated yet */
+ 	if (priv->link_state.up == state.up)
+@@ -3668,6 +3683,7 @@ static int dpaa2_eth_dcbnl_ieee_setpfc(s
+ {
+ 	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
+ 	struct dpni_link_cfg link_cfg = {0};
++	bool tx_pause;
+ 	int err;
+ 
+ 	if (pfc->mbc || pfc->delay)
+@@ -3680,8 +3696,8 @@ static int dpaa2_eth_dcbnl_ieee_setpfc(s
+ 	/* We allow PFC configuration even if it won't have any effect until
+ 	 * general pause frames are enabled
+ 	 */
+-	if (!dpaa2_eth_rx_pause_enabled(priv->link_state.options) ||
+-	    !dpaa2_eth_tx_pause_enabled(priv->link_state.options))
++	tx_pause = dpaa2_eth_tx_pause_enabled(priv->link_state.options);
++	if (!dpaa2_eth_rx_pause_enabled(priv->link_state.options) || !tx_pause)
+ 		netdev_warn(net_dev, "Pause support must be enabled in order for PFC to work!\n");
+ 
+ 	link_cfg.rate = priv->link_state.rate;
+@@ -3702,6 +3718,9 @@ static int dpaa2_eth_dcbnl_ieee_setpfc(s
+ 		return err;
+ 
+ 	memcpy(&priv->pfc, pfc, sizeof(priv->pfc));
++	priv->pfc_enabled = !!pfc->pfc_en;
++
++	dpaa2_eth_set_rx_taildrop(priv, tx_pause, priv->pfc_enabled);
+ 
+ 	return 0;
+ }
+--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h
++++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h
+@@ -422,7 +422,8 @@ struct dpaa2_eth_priv {
+ 	struct dpaa2_eth_drv_stats __percpu *percpu_extras;
+ 
+ 	u16 mc_token;
+-	u8 rx_td_enabled;
++	u8 rx_fqtd_enabled;
++	u8 rx_cgtd_enabled;
+ 
+ 	struct dpni_link_state link_state;
+ 	bool do_link_poll;
+@@ -434,6 +435,7 @@ struct dpaa2_eth_priv {
+ 	struct dpaa2_eth_cls_rule *cls_rules;
+ 	u8 rx_cls_enabled;
+ 	u8 vlan_cls_enabled;
++	u8 pfc_enabled;
+ #ifdef CONFIG_FSL_DPAA2_ETH_DCB
+ 	u8 dcbx_mode;
+ 	struct ieee_pfc pfc;