layerscape: add patches-5.4

Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/

For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.

The patches are sorted into the following categories:
  301-arch-xxxx
  302-dts-xxxx
  303-core-xxxx
  701-net-xxxx
  801-audio-xxxx
  802-can-xxxx
  803-clock-xxxx
  804-crypto-xxxx
  805-display-xxxx
  806-dma-xxxx
  807-gpio-xxxx
  808-i2c-xxxx
  809-jailhouse-xxxx
  810-keys-xxxx
  811-kvm-xxxx
  812-pcie-xxxx
  813-pm-xxxx
  814-qe-xxxx
  815-sata-xxxx
  816-sdhc-xxxx
  817-spi-xxxx
  818-thermal-xxxx
  819-uart-xxxx
  820-usb-xxxx
  821-vfio-xxxx

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>

1 files changed, 38 insertions, 0 deletions

diff --git a/target/linux/layerscape/patches-5.4/302-dts-0111-arm64-dts-fsl-ls1028a-rdb-fix-QSGMII-PHY-node-names.patch b/target/linux/layerscape/patches-5.4/302-dts-0111-arm64-dts-fsl-ls1028a-rdb-fix-QSGMII-PHY-node-names.patch
new file mode 100644
index 0000000000..dbea8abfb6
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/302-dts-0111-arm64-dts-fsl-ls1028a-rdb-fix-QSGMII-PHY-node-names.patch
@@ -0,0 +1,38 @@
+From 85252792bc07b398582e8dacf6ec6d09a5075195 Mon Sep 17 00:00:00 2001
+From: Alex Marginean <alexandru.marginean@nxp.com>
+Date: Tue, 7 Jan 2020 15:15:29 +0200
+Subject: [PATCH] arm64: dts: fsl-ls1028a-rdb: fix QSGMII PHY node names
+
+Use ethernet-phy@ADDR, previously the numbers were wrong.
+
+Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
+---
+ arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
+@@ -215,19 +215,19 @@
+ };
+ 
+ &enetc_mdio_pf3 {
+-	qsgmii_phy1: ethernet-phy@4 {
++	qsgmii_phy1: ethernet-phy@10 {
+ 		reg = <0x10>;
+ 	};
+ 
+-	qsgmii_phy2: ethernet-phy@5 {
++	qsgmii_phy2: ethernet-phy@11 {
+ 		reg = <0x11>;
+ 	};
+ 
+-	qsgmii_phy3: ethernet-phy@6 {
++	qsgmii_phy3: ethernet-phy@12 {
+ 		reg = <0x12>;
+ 	};
+ 
+-	qsgmii_phy4: ethernet-phy@7 {
++	qsgmii_phy4: ethernet-phy@13 {
+ 		reg = <0x13>;
+ 	};
+ };