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| author | Yangbo Lu <yangbo.lu@nxp.com> | 2020-04-10 10:47:05 +0800 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2020-05-07 12:53:06 +0200 |
| commit | cddd4591404fb4c53dc0b3c0b15b942cdbed4356 (patch) | |
| tree | 392c1179de46b0f804e3789edca19069b64e6b44 /target/linux/layerscape/patches-5.4/302-dts-0057-arm64-dts-fsl-lx2160a-add-flexcan-node.patch | |
| parent | d1d2c0b5579ea4f69a42246c9318539d61ba1999 (diff) | |
| download | upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.gz upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.bz2 upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.zip | |
layerscape: add patches-5.4
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/
For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.
The patches are sorted into the following categories:
301-arch-xxxx
302-dts-xxxx
303-core-xxxx
701-net-xxxx
801-audio-xxxx
802-can-xxxx
803-clock-xxxx
804-crypto-xxxx
805-display-xxxx
806-dma-xxxx
807-gpio-xxxx
808-i2c-xxxx
809-jailhouse-xxxx
810-keys-xxxx
811-kvm-xxxx
812-pcie-xxxx
813-pm-xxxx
814-qe-xxxx
815-sata-xxxx
816-sdhc-xxxx
817-spi-xxxx
818-thermal-xxxx
819-uart-xxxx
820-usb-xxxx
821-vfio-xxxx
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Diffstat (limited to 'target/linux/layerscape/patches-5.4/302-dts-0057-arm64-dts-fsl-lx2160a-add-flexcan-node.patch')
| -rw-r--r-- | target/linux/layerscape/patches-5.4/302-dts-0057-arm64-dts-fsl-lx2160a-add-flexcan-node.patch | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/302-dts-0057-arm64-dts-fsl-lx2160a-add-flexcan-node.patch b/target/linux/layerscape/patches-5.4/302-dts-0057-arm64-dts-fsl-lx2160a-add-flexcan-node.patch new file mode 100644 index 0000000000..c85139f216 --- /dev/null +++ b/target/linux/layerscape/patches-5.4/302-dts-0057-arm64-dts-fsl-lx2160a-add-flexcan-node.patch @@ -0,0 +1,103 @@ +From c2046901f933b0e1c87c5cbdab4ba27a3b66317e Mon Sep 17 00:00:00 2001 +From: Pankaj Bansal <pankaj.bansal@nxp.com> +Date: Wed, 8 May 2019 17:49:14 +0530 +Subject: [PATCH] arm64: dts: fsl: lx2160a: add flexcan node + +Add flexcan node in LX2160A SOC file as well as in QDS and RDB files. +The device tree bindings used can be referred from +Documentation/devicetree/bindings/net/can/fsl-flexcan.txt + +Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> +--- + arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 10 +++++++++- + arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 18 +++++++++++++++++- + arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 18 ++++++++++++++++++ + 3 files changed, 44 insertions(+), 2 deletions(-) + +--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts ++++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts +@@ -2,7 +2,7 @@ + // + // Device Tree file for LX2160AQDS + // +-// Copyright 2018 NXP ++// Copyright 2018-2019 NXP + + /dts-v1/; + +@@ -155,6 +155,14 @@ + }; + }; + ++&can0 { ++ status = "okay"; ++}; ++ ++&can1 { ++ status = "okay"; ++}; ++ + &crypto { + status = "okay"; + }; +--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts ++++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts +@@ -2,7 +2,7 @@ + // + // Device Tree file for LX2160ARDB + // +-// Copyright 2018 NXP ++// Copyright 2018-2019 NXP + + /dts-v1/; + +@@ -31,6 +31,22 @@ + }; + }; + ++&can0 { ++ status = "okay"; ++ ++ can-transceiver { ++ max-bitrate = <5000000>; ++ }; ++}; ++ ++&can1 { ++ status = "okay"; ++ ++ can-transceiver { ++ max-bitrate = <5000000>; ++ }; ++}; ++ + &crypto { + status = "okay"; + }; +--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi ++++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +@@ -753,6 +753,24 @@ + status = "disabled"; + }; + ++ can0: can@2180000 { ++ compatible = "fsl,lx2160ar1-flexcan"; ++ reg = <0x0 0x2180000 0x0 0x10000>; ++ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&sysclk>, <&clockgen 4 7>; ++ clock-names = "ipg", "per"; ++ status = "disabled"; ++ }; ++ ++ can1: can@2190000 { ++ compatible = "fsl,lx2160ar1-flexcan"; ++ reg = <0x0 0x2190000 0x0 0x10000>; ++ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&sysclk>, <&clockgen 4 7>; ++ clock-names = "ipg", "per"; ++ status = "disabled"; ++ }; ++ + uart0: serial@21c0000 { + compatible = "arm,sbsa-uart","arm,pl011"; + reg = <0x0 0x21c0000 0x0 0x1000>; |