lantiq: add Linux 5.4 support as testing kernel version

Switch to the mainline Lantiq PCIe PHY driver and update the vr9.dtsi
accordingly.

The Lantiq IRQ SMP support added upstream required changes to the SoC
dtsi as well.

Following changes are made to the Lantiq kernel patches:

  0005-lantiq_etop-pass-struct-device-to-DMA-API-functions.patch
  0006-MIPS-lantiq-pass-struct-device-to-DMA-API-functions.patch
    applied upstream

  0008-MIPS-lantiq-backport-old-timer-code.patch
    access_ok API update because it lost it's type (which was the first)
    parameter in upstream commit 96d4f267e40f95 ("Remove 'type' argument
    from access_ok() function")

  0024-MIPS-lantiq-autoselect-soc-rev-matching-fw.patch
    merged into 0026-MIPS-lantiq-Add-GPHY-Firmware-loader.patch

  0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch
    revert upstream changes required for upstream xrx200 ethernet and
    xrx200 (DSA) switch driver but breaking our driver

  0026-MIPS-lantiq-Add-GPHY-Firmware-loader.patch
    required for our driver but dropped upstream, add former upstream
    version

  0028-NET-lantiq-various-etop-fixes.patch
    now has to use the phy_set_max_speed API instead of modifying
    phydev->supported. Also call ltq_dma_enable_irq() in
    ltq_etop_open() based on upstream commit cc973aecf0b054 ("MIPS:
    lantiq: Do not enable IRQs in dma open")

Signed-off-by: Mathias Kresin <dev@kresin.me>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

1 files changed, 55 insertions, 0 deletions

diff --git a/target/linux/lantiq/patches-5.4/0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch b/target/linux/lantiq/patches-5.4/0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch
new file mode 100644
index 0000000000..a364d6d67b
--- /dev/null
+++ b/target/linux/lantiq/patches-5.4/0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch
@@ -0,0 +1,55 @@
+From d0ee51bbb7ce9880749a3d4794ec1fbbcda0f381 Mon Sep 17 00:00:00 2001
+From: Mathias Kresin <dev@kresin.me>
+Date: Sun, 7 Jul 2019 21:45:51 +0200
+Subject: [PATCH] MIPS: lantiq revert DSA switch driver PMU/clock changes
+
+Switch back to the former used names, to make the legacy switch driver
+happy.
+
+Signed-off-by: Mathias Kresin <dev@kresin.me>
+---
+ arch/mips/lantiq/xway/sysctrl.c | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+--- a/arch/mips/lantiq/xway/sysctrl.c
++++ b/arch/mips/lantiq/xway/sysctrl.c
+@@ -503,7 +503,7 @@ void __init ltq_soc_init(void)
+ 		clkdev_add_pmu("1a800000.pcie", "msi", 1, 1, PMU1_PCIE2_MSI);
+ 		clkdev_add_pmu("1f106a00.pcie", "pdi", 1, 1, PMU1_PCIE2_PDI);
+ 		clkdev_add_pmu("1a800000.pcie", "ctl", 1, 1, PMU1_PCIE2_CTL);
+-		clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
++		clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
+ 		clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
+ 		clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
+ 	} else if (of_machine_is_compatible("lantiq,ar10")) {
+@@ -511,11 +511,11 @@ void __init ltq_soc_init(void)
+ 				  ltq_ar10_fpi_hz(), ltq_ar10_pp32_hz());
+ 		clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
+ 		clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1);
+-		clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH |
++		clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH |
+ 			       PMU_PPE_DP | PMU_PPE_TC);
+ 		clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
+-		clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY);
+-		clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY);
++		clkdev_add_pmu("1f203020.gphy", NULL, 1, 0, PMU_GPHY);
++		clkdev_add_pmu("1f203068.gphy", NULL, 1, 0, PMU_GPHY);
+ 		clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
+ 		clkdev_add_pmu("1e116000.mei", "afe", 1, 2, PMU_ANALOG_DSL_AFE);
+ 		clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
+@@ -534,12 +534,12 @@ void __init ltq_soc_init(void)
+ 		clkdev_add_pmu(NULL, "ahb", 1, 0, PMU_AHBM | PMU_AHBS);
+ 
+ 		clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
+-		clkdev_add_pmu("1e10b308.eth", NULL, 0, 0,
++		clkdev_add_pmu("1e108000.eth", NULL, 0, 0,
+ 				PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
+ 				PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
+ 				PMU_PPE_QSB | PMU_PPE_TOP);
+-		clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY);
+-		clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY);
++		clkdev_add_pmu("1f203020.gphy", NULL, 0, 0, PMU_GPHY);
++		clkdev_add_pmu("1f203068.gphy", NULL, 0, 0, PMU_GPHY);
+ 		clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
+ 		clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
+ 		clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);