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author | Rui Salvaterra <rsalvaterra@gmail.com> | 2021-11-18 18:24:32 +0000 |
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committer | Daniel Golle <daniel@makrotopia.org> | 2021-11-19 09:40:29 +0000 |
commit | 3ae5da5adce90443426a477784e68cd9d49ded06 (patch) | |
tree | d4f444a667edc51ffdb55a156a2b5adc82244c9e /target/linux/lantiq/patches-5.10/0111-MIPS-lantiq-dma-reset-correct-number-of-channel.patch | |
parent | d745835ae19caf1999924a434abd25e92cce4343 (diff) | |
download | upstream-3ae5da5adce90443426a477784e68cd9d49ded06.tar.gz upstream-3ae5da5adce90443426a477784e68cd9d49ded06.tar.bz2 upstream-3ae5da5adce90443426a477784e68cd9d49ded06.zip |
kernel: bump 5.10 to 5.10.80
Deleted (upstreamed):
ath79/patches-5.10/921-serial-core-add-support-for-boot-console-with-arbitr.patch [1]
bcm53xx/patches-5.10/033-v5.15-0012-ARM-dts-BCM5301X-Fix-memory-nodes-names.patch [2]
lantiq/patches-5.10/0016-mtd-rawnand-xway-Keep-the-driver-compatible-with-on-.patch [3]
lantiq/patches-5.10/0110-MIPS-lantiq-dma-add-small-delay-after-reset.patch [4]
lantiq/patches-5.10/0111-MIPS-lantiq-dma-reset-correct-number-of-channel.patch [5]
lantiq/patches-5.10/0112-MIPS-lantiq-dma-fix-burst-length-for-DEU.patch [6]
Manually rebased:
ipq806x/patches-5.10/0065-arm-override-compiler-flags.patch
[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.80&id=47462c5e600fbaffd755cd13dedd80d04e41ff83
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.80&id=2fde76df1885a6bec04317e457121326070450eb
[3] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.80&id=9b366f5221d8aa64b22f35be137a5749326444ce
[4] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.80&id=5af57ce8a6155fe3e4270d28d171abf8903bebc0
[5] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.80&id=b92a5df2c7adc79a57481445f67de0c1c716581f
[6] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.80&id=6b72caabc47011d03f44064452b2c65e8ed18326
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Diffstat (limited to 'target/linux/lantiq/patches-5.10/0111-MIPS-lantiq-dma-reset-correct-number-of-channel.patch')
-rw-r--r-- | target/linux/lantiq/patches-5.10/0111-MIPS-lantiq-dma-reset-correct-number-of-channel.patch | 68 |
1 files changed, 0 insertions, 68 deletions
diff --git a/target/linux/lantiq/patches-5.10/0111-MIPS-lantiq-dma-reset-correct-number-of-channel.patch b/target/linux/lantiq/patches-5.10/0111-MIPS-lantiq-dma-reset-correct-number-of-channel.patch deleted file mode 100644 index 5d1862d576..0000000000 --- a/target/linux/lantiq/patches-5.10/0111-MIPS-lantiq-dma-reset-correct-number-of-channel.patch +++ /dev/null @@ -1,68 +0,0 @@ -From d31260c2f6a5cdddb052ab7cb09560eb23ce6597 Mon Sep 17 00:00:00 2001 -From: Aleksander Jan Bajkowski <olek2@wp.pl> -Date: Thu, 15 Apr 2021 21:28:24 +0200 -Subject: [PATCH 2/5] MIPS: lantiq: dma: reset correct number of channel - -Different SoCs have a different number of channels, e.g .: -* amazon-se has 10 channels, -* danube+ar9 have 20 channels, -* vr9 has 28 channels, -* ar10 has 24 channels. - -We can read the ID register and, depending on the reported -number of channels, reset the appropriate number of channels. - -Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> ---- - arch/mips/lantiq/xway/dma.c | 11 ++++++----- - 1 file changed, 6 insertions(+), 5 deletions(-) - ---- a/arch/mips/lantiq/xway/dma.c -+++ b/arch/mips/lantiq/xway/dma.c -@@ -30,6 +30,7 @@ - #define LTQ_DMA_PCTRL 0x44 - #define LTQ_DMA_IRNEN 0xf4 - -+#define DMA_ID_CHNR GENMASK(26, 20) /* channel number */ - #define DMA_DESCPT BIT(3) /* descriptor complete irq */ - #define DMA_TX BIT(8) /* TX channel direction */ - #define DMA_CHAN_ON BIT(0) /* channel on / off bit */ -@@ -40,7 +41,6 @@ - #define DMA_POLL BIT(31) /* turn on channel polling */ - #define DMA_CLK_DIV4 BIT(6) /* polling clock divider */ - #define DMA_2W_BURST BIT(1) /* 2 word burst length */ --#define DMA_MAX_CHANNEL 20 /* the soc has 20 channels */ - #define DMA_ETOP_ENDIANNESS (0xf << 8) /* endianness swap etop channels */ - #define DMA_WEIGHT (BIT(17) | BIT(16)) /* default channel wheight */ - -@@ -206,7 +206,7 @@ ltq_dma_init(struct platform_device *pde - { - struct clk *clk; - struct resource *res; -- unsigned id; -+ unsigned int id, nchannels; - int i; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -@@ -228,17 +228,18 @@ ltq_dma_init(struct platform_device *pde - ltq_dma_w32(0, LTQ_DMA_IRNEN); - - /* reset/configure each channel */ -- for (i = 0; i < DMA_MAX_CHANNEL; i++) { -+ id = ltq_dma_r32(LTQ_DMA_ID); -+ nchannels = ((id & DMA_ID_CHNR) >> 20); -+ for (i = 0; i < nchannels; i++) { - ltq_dma_w32(i, LTQ_DMA_CS); - ltq_dma_w32(DMA_CHAN_RST, LTQ_DMA_CCTRL); - ltq_dma_w32(DMA_POLL | DMA_CLK_DIV4, LTQ_DMA_CPOLL); - ltq_dma_w32_mask(DMA_CHAN_ON, 0, LTQ_DMA_CCTRL); - } - -- id = ltq_dma_r32(LTQ_DMA_ID); - dev_info(&pdev->dev, - "Init done - hw rev: %X, ports: %d, channels: %d\n", -- id & 0x1f, (id >> 16) & 0xf, id >> 20); -+ id & 0x1f, (id >> 16) & 0xf, nchannels); - - return 0; - } |