ipq807x: add Qualcomm Atheros IPQ807x target

Qualcomm Atheros IPQ807x is a modern WiSoC featuring:
* Quad Core ARMv8 Cortex A-53
	* @ 2.2 GHz (IPQ8072A/4A/6A/8A) Codename Hawkeye
	* @ 1.4 GHz (IPQ8070A/1A) Codename Acorn
* Dual Band simultaneaous IEEE 802.11ax
	* 5G: 8x8/80 or 4x4/160MHz (IPQ8074A/8A)
	* 5G: 4x4/80 or 2x2/160MHz (IPQ8071A/2A/6A)
	* 5G: 2x2/80MHz (IPQ8070A)
	* 2G: 4x4/40MHz (IPQ8072A/4A/6A/8A)
	* 2G: 2x2/40MHz (IPQ8070A/1A)
* 1x PSGMII via QCA8072/5 (Max 5x 1GbE ports)
* 2x SGMII/USXGMII (1/2.5/5/10 GbE) on Hawkeye
* 2x SGMII/USXGMII (1/2.5/5 GbE) on Acorn
* DDR3L/4 32/16 bit up to 2400MT/s
* SDIO 3.0/SD card 3.0/eMMC 5.1
* Dual USB 3.0
* One PCIe Gen2.1 and one PCIe Gen3.0 port (Single lane)
* Parallel NAND (ONFI)/LCD
* 6x QUP BLSP SPI/I2C/UART
* I2S, PCM, and TDMA
* HW PWM
* 1.8V configurable GPIO
* Companion PMP8074 PMIC via SPMI (GPIOS, RTC etc)

Note that only v2 SOC models aka the ones ending with A suffix are
supported, v1 models do not comply to the final 802.11ax and have
lower clocks, lack the Gen3 PCIe etc.

SoC itself has two UBI32 cores for the NSS offloading system, however
currently no offloading is supported.

Signed-off-by: Robert Marko <robimarko@gmail.com>

1 files changed, 59 insertions, 0 deletions

diff --git a/target/linux/ipq807x/patches-5.15/0062-v6.0-regulator-qcom_spmi-add-support-for-HT_P600.patch b/target/linux/ipq807x/patches-5.15/0062-v6.0-regulator-qcom_spmi-add-support-for-HT_P600.patch
new file mode 100644
index 0000000000..6b76f2c3fc
--- /dev/null
+++ b/target/linux/ipq807x/patches-5.15/0062-v6.0-regulator-qcom_spmi-add-support-for-HT_P600.patch
@@ -0,0 +1,59 @@
+From 14789f38e03c42857613b69ff0f032e03653b246 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Mon, 4 Jul 2022 23:23:55 +0200
+Subject: [PATCH] regulator: qcom_spmi: add support for HT_P600
+
+HT_P600 is a LDO PMOS regulator based on LV P600 using HFS430 layout
+found in PMP8074 and PMS405 PMIC-s.
+
+Both PMP8074 and PMS405 define the programmable range as 1.704 to 1.896V
+but the actual MAX output voltage depends on the exact LDO in each of
+the PMIC-s.
+Their usual voltage that they are used is 1.8V.
+
+It has a max current of 600mA, voltage step of 8mV.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+Link: https://lore.kernel.org/r/20220704212402.1715182-5-robimarko@gmail.com
+Signed-off-by: Mark Brown <broonie@kernel.org>
+---
+ drivers/regulator/qcom_spmi-regulator.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/drivers/regulator/qcom_spmi-regulator.c
++++ b/drivers/regulator/qcom_spmi-regulator.c
+@@ -165,6 +165,7 @@ enum spmi_regulator_subtype {
+ 	SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4	= 0x10,
+ 	SPMI_REGULATOR_SUBTYPE_HFS430		= 0x0a,
+ 	SPMI_REGULATOR_SUBTYPE_HT_P150		= 0x35,
++	SPMI_REGULATOR_SUBTYPE_HT_P600		= 0x3d,
+ };
+ 
+ enum spmi_common_regulator_registers {
+@@ -549,6 +550,10 @@ static struct spmi_voltage_range ht_p150
+ 	SPMI_VOLTAGE_RANGE(0, 1616000, 1616000, 3304000, 3304000, 8000),
+ };
+ 
++static struct spmi_voltage_range ht_p600_ranges[] = {
++	SPMI_VOLTAGE_RANGE(0, 1704000, 1704000, 1896000, 1896000, 8000),
++};
++
+ static DEFINE_SPMI_SET_POINTS(pldo);
+ static DEFINE_SPMI_SET_POINTS(nldo1);
+ static DEFINE_SPMI_SET_POINTS(nldo2);
+@@ -570,6 +575,7 @@ static DEFINE_SPMI_SET_POINTS(ht_lvpldo)
+ static DEFINE_SPMI_SET_POINTS(ht_nldo);
+ static DEFINE_SPMI_SET_POINTS(hfs430);
+ static DEFINE_SPMI_SET_POINTS(ht_p150);
++static DEFINE_SPMI_SET_POINTS(ht_p600);
+ 
+ static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf,
+ 				 int len)
+@@ -1464,6 +1470,7 @@ static const struct regulator_ops spmi_h
+ 
+ static const struct spmi_regulator_mapping supported_regulators[] = {
+ 	/*           type subtype dig_min dig_max ltype ops setpoints hpm_min */
++	SPMI_VREG(LDO,   HT_P600,  0, INF, HFS430, hfs430, ht_p600, 10000),
+ 	SPMI_VREG(LDO,   HT_P150,  0, INF, HFS430, hfs430, ht_p150, 10000),
+ 	SPMI_VREG(BUCK,  GP_CTL,   0, INF, SMPS,   smps,   smps,   100000),
+ 	SPMI_VREG(BUCK,  HFS430,   0, INF, HFS430, hfs430, hfs430,  10000),