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| author | John Crispin <john@phrozen.org> | 2017-03-13 13:30:10 +0100 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2017-03-13 13:40:55 +0100 |
| commit | 1adf51702e94063fb058ce13226ec5a04d15cfd4 (patch) | |
| tree | 00fb0f446f516289abb93ff78f103294254545c3 /target/linux/ipq806x/patches-4.9/0019-qcom-ipq4019-use-correct-clock-for-i2c-bus-0.patch | |
| parent | 99b6aefd638c7934136ffcde271e6fc3f4f6c464 (diff) | |
| download | upstream-1adf51702e94063fb058ce13226ec5a04d15cfd4.tar.gz upstream-1adf51702e94063fb058ce13226ec5a04d15cfd4.tar.bz2 upstream-1adf51702e94063fb058ce13226ec5a04d15cfd4.zip | |
ipq806x: clean up patches, port missing patches from 4.4
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'target/linux/ipq806x/patches-4.9/0019-qcom-ipq4019-use-correct-clock-for-i2c-bus-0.patch')
| -rw-r--r-- | target/linux/ipq806x/patches-4.9/0019-qcom-ipq4019-use-correct-clock-for-i2c-bus-0.patch | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches-4.9/0019-qcom-ipq4019-use-correct-clock-for-i2c-bus-0.patch b/target/linux/ipq806x/patches-4.9/0019-qcom-ipq4019-use-correct-clock-for-i2c-bus-0.patch new file mode 100644 index 0000000000..54ee571cbb --- /dev/null +++ b/target/linux/ipq806x/patches-4.9/0019-qcom-ipq4019-use-correct-clock-for-i2c-bus-0.patch @@ -0,0 +1,28 @@ +From 7292bf171cdf2fb48607058f12ddd0d812a87428 Mon Sep 17 00:00:00 2001 +From: Matthew McClintock <mmcclint@qca.qualcomm.com> +Date: Fri, 29 Apr 2016 12:48:02 -0500 +Subject: [PATCH 19/69] qcom: ipq4019: use correct clock for i2c bus 0 + +For the record the mapping is as follows: + +QUP0 = SPI QUP1 +QUP1 = SPI QUP2 +QUP2 = I2C QUP1 +QUP3 = I2C QUP2 + +Signed-off-by: Matthew McClintock <mmcclint@qca.qualcomm.com> +--- + arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -175,7 +175,7 @@ + reg = <0x78b7000 0x6000>; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, +- <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; ++ <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>; + clock-names = "iface", "core"; + #address-cells = <1>; + #size-cells = <0>; |