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| author | Christian Lamparter <chunkeey@gmail.com> | 2019-11-28 22:28:48 +0100 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2019-12-19 22:41:57 +0100 |
| commit | 63066d3006958ca52df71f53c6f413ad4fb74974 (patch) | |
| tree | 08dd597a38f839e6a14f20fadc6e1d39c69fe3f0 /target/linux/ipq806x/patches-4.19/0071-5-PCI-qcom-Programming-the-PCIE-iATU-for-IPQ806x.patch | |
| parent | 53801ae1c79ecf5153d658951e3c3afed4a16d93 (diff) | |
| download | upstream-63066d3006958ca52df71f53c6f413ad4fb74974.tar.gz upstream-63066d3006958ca52df71f53c6f413ad4fb74974.tar.bz2 upstream-63066d3006958ca52df71f53c6f413ad4fb74974.zip | |
ipq806x: refresh 4.19 patches
Reworked:
- 0034 patchset update
Added:
- 080 Add support for pinctrl-msm framework
Removed:
- 0074-ipq806x-usb-Control-USB-master-reset.patch
(we now have a dedicated driver for qcom usb)
- 0047-mtd-nand-Create-a-BBT-flag-to-access-bad-block-marke
(merged upstream)
- 310-msm-adhoc-bus-support
(it looks like it was never actually used in any dts)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
[commit subject and description facelift, SoB fix]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Diffstat (limited to 'target/linux/ipq806x/patches-4.19/0071-5-PCI-qcom-Programming-the-PCIE-iATU-for-IPQ806x.patch')
| -rw-r--r-- | target/linux/ipq806x/patches-4.19/0071-5-PCI-qcom-Programming-the-PCIE-iATU-for-IPQ806x.patch | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/target/linux/ipq806x/patches-4.19/0071-5-PCI-qcom-Programming-the-PCIE-iATU-for-IPQ806x.patch b/target/linux/ipq806x/patches-4.19/0071-5-PCI-qcom-Programming-the-PCIE-iATU-for-IPQ806x.patch index 92100481c8..f6ebe0c0af 100644 --- a/target/linux/ipq806x/patches-4.19/0071-5-PCI-qcom-Programming-the-PCIE-iATU-for-IPQ806x.patch +++ b/target/linux/ipq806x/patches-4.19/0071-5-PCI-qcom-Programming-the-PCIE-iATU-for-IPQ806x.patch @@ -8,12 +8,10 @@ Resolved PCIE EP detection errors caused due to missing iATU programming. Change-Id: Ie95c0f8cb940abc0192a8a3c4e825ddba54b72fe Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org> --- - drivers/pci/host/pcie-qcom.c | 77 ++++++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 77 insertions(+) ---- a/drivers/pci/dwc/pcie-qcom.c -+++ b/drivers/pci/dwc/pcie-qcom.c -@@ -83,6 +83,30 @@ +--- a/drivers/pci/controller/dwc/pcie-qcom.c ++++ b/drivers/pci/controller/dwc/pcie-qcom.c +@@ -76,6 +76,30 @@ #define PCIE20_CAP_LINK_1 (PCIE20_CAP + 0x14) #define PCIE_CAP_LINK1_VAL 0x2FD7F @@ -44,7 +42,7 @@ Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org> #define PCIE20_PARF_Q2A_FLUSH 0x1AC #define PCIE20_MISC_CONTROL_1_REG 0x8BC -@@ -251,6 +275,57 @@ static void qcom_pcie_2_1_0_ltssm_enable +@@ -240,6 +264,57 @@ static void qcom_pcie_2_1_0_ltssm_enable writel(val, pcie->elbi + PCIE20_ELBI_SYS_CTRL); } @@ -102,7 +100,7 @@ Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org> static int qcom_pcie_get_resources_2_1_0(struct qcom_pcie *pcie) { struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0; -@@ -465,6 +540,9 @@ static int qcom_pcie_init_2_1_0(struct q +@@ -437,6 +512,9 @@ static int qcom_pcie_init_2_1_0(struct q writel(CFG_BRIDGE_SB_INIT, pci->dbi_base + PCIE20_AXI_MSTR_RESP_COMP_CTRL1); |