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authorAnsuel Smith <ansuelsmth@gmail.com>2019-11-28 21:41:20 +0100
committerPetr Štetiar <ynezz@true.cz>2019-12-19 22:41:57 +0100
commitc5d2f3c4765a93dbca9654858a8dec8bf307ad5f (patch)
tree61906595f55dbd17219d94438efb782cff4cb457 /target/linux/ipq806x/patches-4.19/0062-ipq806x-gcc-Added-the-enable-regs-and-mask-for-PRNG.patch
parentb1e8a390ea7bde59eb47bdd729228cb377aa6f6f (diff)
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ipq806x: copy files from 4.14 to 4.19
This copies files from files-4.14 to files-4.19 directory in order to get clear diffs for any changes done from now on. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> [added missing commit description, refreshed ea8500 and wpq864 DTS] Signed-off-by: Petr Štetiar <ynezz@true.cz>
Diffstat (limited to 'target/linux/ipq806x/patches-4.19/0062-ipq806x-gcc-Added-the-enable-regs-and-mask-for-PRNG.patch')
-rw-r--r--target/linux/ipq806x/patches-4.19/0062-ipq806x-gcc-Added-the-enable-regs-and-mask-for-PRNG.patch25
1 files changed, 25 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches-4.19/0062-ipq806x-gcc-Added-the-enable-regs-and-mask-for-PRNG.patch b/target/linux/ipq806x/patches-4.19/0062-ipq806x-gcc-Added-the-enable-regs-and-mask-for-PRNG.patch
new file mode 100644
index 0000000000..717934315a
--- /dev/null
+++ b/target/linux/ipq806x/patches-4.19/0062-ipq806x-gcc-Added-the-enable-regs-and-mask-for-PRNG.patch
@@ -0,0 +1,25 @@
+From a16fcf911a020e46439a3bb3e702463fc3159831 Mon Sep 17 00:00:00 2001
+From: Abhishek Sahu <absahu@codeaurora.org>
+Date: Wed, 18 Nov 2015 12:38:56 +0530
+Subject: [PATCH 62/69] ipq806x: gcc: Added the enable regs and mask for PRNG
+
+kernel got hanged while reading from /dev/hwrng at the
+time of PRNG clock enable
+
+Change-Id: I89856c7e19e6639508e6a2774304583a3ec91172
+Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
+---
+ drivers/clk/qcom/gcc-ipq806x.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/clk/qcom/gcc-ipq806x.c
++++ b/drivers/clk/qcom/gcc-ipq806x.c
+@@ -1233,6 +1233,8 @@ static struct clk_rcg prng_src = {
+ .parent_map = gcc_pxo_pll8_map,
+ },
+ .clkr = {
++ .enable_reg = 0x2e80,
++ .enable_mask = BIT(11),
+ .hw.init = &(struct clk_init_data){
+ .name = "prng_src",
+ .parent_names = gcc_pxo_pll8,