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| author | Ansuel Smith <ansuelsmth@gmail.com> | 2021-04-02 23:38:11 +0200 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2021-07-19 14:51:22 +0200 |
| commit | 0458a8993ca1c1594bc19d247909324f157abeef (patch) | |
| tree | 5e3fb05301150bdfc0062656c8449defec6363c9 /target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts | |
| parent | d284e6ef0f06551bad5696f16f26e6ff27b065d4 (diff) | |
| download | upstream-0458a8993ca1c1594bc19d247909324f157abeef.tar.gz upstream-0458a8993ca1c1594bc19d247909324f157abeef.tar.bz2 upstream-0458a8993ca1c1594bc19d247909324f157abeef.zip | |
ipq806x: convert mtd-mac-address to nvmem implementation
Define nvmem-cells and convert mtd-mac-address to nvmem implementation.
The conversion is done with an automated script.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Diffstat (limited to 'target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts')
| -rw-r--r-- | target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts index 3e04618d57..c6feb71a8e 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts @@ -416,7 +416,8 @@ phy-mode = "rgmii"; qcom,id = <1>; mdiobus = <&mdio0>; - mtd-mac-address = <&factory 0x0>; + nvmem-cells = <&macaddr_factory_0>; + nvmem-cell-names = "mac-address"; fixed-link { speed = <1000>; @@ -429,10 +430,25 @@ phy-mode = "sgmii"; qcom,id = <2>; mdiobus = <&mdio0>; - mtd-mac-address = <&factory 0x6>; + nvmem-cells = <&macaddr_factory_6>; + nvmem-cell-names = "mac-address"; fixed-link { speed = <1000>; full-duplex; }; }; + +&factory { + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_factory_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_factory_6: macaddr@6 { + reg = <0x6 0x6>; + }; +}; |