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authorRobert Marko <robert.marko@sartura.hr>2021-09-13 14:08:35 +0200
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>2021-09-25 19:28:54 +0200
commit8f27ac5ec066e6cc85013eb49150aa5d7144de33 (patch)
treef940932a4b0ee58d0048a8af3c0f18d3ae2a2a63 /target/linux/ipq40xx/patches-5.10/0003-v5.7-ARM-dts-qcom-add-gpio-ranges-property.patch
parent7ff0efa0b0dc5719b19ffafcee5544f55f05be4b (diff)
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ipq40xx: 5.10: copy patches
Copy over the 5.4 kernel patches to 5.10 folder. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Diffstat (limited to 'target/linux/ipq40xx/patches-5.10/0003-v5.7-ARM-dts-qcom-add-gpio-ranges-property.patch')
-rw-r--r--target/linux/ipq40xx/patches-5.10/0003-v5.7-ARM-dts-qcom-add-gpio-ranges-property.patch119
1 files changed, 119 insertions, 0 deletions
diff --git a/target/linux/ipq40xx/patches-5.10/0003-v5.7-ARM-dts-qcom-add-gpio-ranges-property.patch b/target/linux/ipq40xx/patches-5.10/0003-v5.7-ARM-dts-qcom-add-gpio-ranges-property.patch
new file mode 100644
index 0000000000..6922bc8ff3
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.10/0003-v5.7-ARM-dts-qcom-add-gpio-ranges-property.patch
@@ -0,0 +1,119 @@
+From 8b99dc0922618062a1589ebd74df6108b4f9ac22 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Wed, 8 Jan 2020 13:54:55 +0100
+Subject: [PATCH] ARM: dts: qcom: add gpio-ranges property
+
+This patch adds the gpio-ranges property to almost all of
+the Qualcomm ARM platforms that utilize the pinctrl-msm
+framework.
+
+The gpio-ranges property is part of the gpiolib subsystem.
+As a result, the binding text is available in section
+"2.1 gpio- and pin-controller interaction" of
+Documentation/devicetree/bindings/gpio/gpio.txt
+
+For more information please see the patch titled:
+"pinctrl: msm: fix gpio-hog related boot issues" from
+this series.
+
+Reported-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
+Tested-by: Sven Eckelmann <sven.eckelmann@openmesh.com> [ipq4019]
+Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+Tested-by: Robert Marko <robert.marko@sartura.hr> [ipq4019]
+Cc: Luka Perkov <luka.perkov@sartura.hr>
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+Link: https://lore.kernel.org/r/20200108125455.308969-1-robert.marko@sartura.hr
+Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+---
+ arch/arm/boot/dts/qcom-apq8064.dtsi | 1 +
+ arch/arm/boot/dts/qcom-apq8084.dtsi | 1 +
+ arch/arm/boot/dts/qcom-ipq4019.dtsi | 1 +
+ arch/arm/boot/dts/qcom-ipq8064.dtsi | 1 +
+ arch/arm/boot/dts/qcom-mdm9615.dtsi | 1 +
+ arch/arm/boot/dts/qcom-msm8660.dtsi | 1 +
+ arch/arm/boot/dts/qcom-msm8960.dtsi | 1 +
+ arch/arm/boot/dts/qcom-msm8974.dtsi | 1 +
+ 8 files changed, 8 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
+@@ -350,6 +350,7 @@
+ reg = <0x800000 0x4000>;
+
+ gpio-controller;
++ gpio-ranges = <&tlmm_pinmux 0 0 90>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
++++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
+@@ -401,6 +401,7 @@
+ compatible = "qcom,apq8084-pinctrl";
+ reg = <0xfd510000 0x4000>;
+ gpio-controller;
++ gpio-ranges = <&tlmm 0 0 147>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+@@ -201,6 +201,7 @@
+ compatible = "qcom,ipq4019-pinctrl";
+ reg = <0x01000000 0x300000>;
+ gpio-controller;
++ gpio-ranges = <&tlmm 0 0 100>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+@@ -119,6 +119,7 @@
+ reg = <0x800000 0x4000>;
+
+ gpio-controller;
++ gpio-ranges = <&qcom_pinmux 0 0 69>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+--- a/arch/arm/boot/dts/qcom-mdm9615.dtsi
++++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi
+@@ -128,6 +128,7 @@
+ msmgpio: pinctrl@800000 {
+ compatible = "qcom,mdm9615-pinctrl";
+ gpio-controller;
++ gpio-ranges = <&msmgpio 0 0 88>;
+ #gpio-cells = <2>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
++++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
+@@ -115,6 +115,7 @@
+ reg = <0x800000 0x4000>;
+
+ gpio-controller;
++ gpio-ranges = <&tlmm 0 0 173>;
+ #gpio-cells = <2>;
+ interrupts = <0 16 0x4>;
+ interrupt-controller;
+--- a/arch/arm/boot/dts/qcom-msm8960.dtsi
++++ b/arch/arm/boot/dts/qcom-msm8960.dtsi
+@@ -107,6 +107,7 @@
+ msmgpio: pinctrl@800000 {
+ compatible = "qcom,msm8960-pinctrl";
+ gpio-controller;
++ gpio-ranges = <&msmgpio 0 0 152>;
+ #gpio-cells = <2>;
+ interrupts = <0 16 0x4>;
+ interrupt-controller;
+--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
++++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
+@@ -707,6 +707,7 @@
+ compatible = "qcom,msm8974-pinctrl";
+ reg = <0xfd510000 0x4000>;
+ gpio-controller;
++ gpio-ranges = <&msmgpio 0 0 146>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;