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authorRobert Marko <robert.marko@sartura.hr>2021-03-04 12:38:31 +0100
committerChristian Lamparter <chunkeey@gmail.com>2021-03-05 00:28:35 +0100
commit7f2d9ccd09a1d3034aaf9c943747fc1631da5cac (patch)
treec625a844d0293568ccc0e88005ca5c420bb10357 /target/linux/ipq40xx/files/drivers
parent18a9eff0f607139bc0215197ed8957432d5632e8 (diff)
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ipq40xx: net: phy: qca807x: fix GPIO driver
While rebasing into setting bits instead of magic values, I accidentally forgot to actually set the force bit. Without it using the pins as GPIO-s did not actually work. Fixes: b5c93ed ("ipq40xx: add Qualcomm QCA807x driver") Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Diffstat (limited to 'target/linux/ipq40xx/files/drivers')
-rw-r--r--target/linux/ipq40xx/files/drivers/net/phy/qca807x.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c b/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
index 10d38d94a6..16d7a80455 100644
--- a/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
+++ b/target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
@@ -356,6 +356,7 @@ static void qca807x_gpio_set(struct gpio_chip *gc, unsigned int offset, int valu
val = phy_read_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset));
val &= ~QCA807X_GPIO_FORCE_MODE_MASK;
+ val |= QCA807X_GPIO_FORCE_EN;
val |= FIELD_PREP(QCA807X_GPIO_FORCE_MODE_MASK, value);
phy_write_mmd(priv->phy, MDIO_MMD_AN, qca807x_gpio_get_reg(offset), val);