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author | Richard Yu <yurichard3839@gmail.com> | 2021-11-12 11:16:21 +0800 |
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committer | Christian Lamparter <chunkeey@gmail.com> | 2021-11-14 14:28:34 +0100 |
commit | 12d33d388c52565803a746586426bed3d3fcc941 (patch) | |
tree | 4fa4801f401bad56f741e22ffb67211b89512049 /target/linux/ipq40xx/files/arch | |
parent | b5ab6d0bc577e81a77f39211883f6c0c4155b6ed (diff) | |
download | upstream-12d33d388c52565803a746586426bed3d3fcc941.tar.gz upstream-12d33d388c52565803a746586426bed3d3fcc941.tar.bz2 upstream-12d33d388c52565803a746586426bed3d3fcc941.zip |
ipq40xx: add support for P&W R619AC (aka G-DOCK 2.0)
P&W R619AC is a IPQ4019 Dual-Band AC1200 router.
It is made by P&W (p2w-tech.com) known as P&W R619AC
but marketed and sold more popularly as G-DOCK 2.0.
Specification:
* SOC: Qualcomm Atheros IPQ4019 (717 MHz)
* RAM: 512 MiB
* Flash: 16 MiB (NOR) + 128 MiB (NAND)
* Ethernet: 5 x 10/100/1000 (4 x LAN, 1 x WAN)
* Wireless:
- 2.4 GHz b/g/n Qualcomm Atheros IPQ4019
- 5 GHz a/n/ac Qualcomm Atheros IPQ4019
* USB: 1 x USB 3.0
* LED: 4 x LAN, 1 x WAN, 2 x WiFi, 1 x Power (All Blue LED)
* Input: 1 x reset
* 1 x MicroSD card slot
* Serial console: 115200bps, pinheader J2 on PCB
* Power: DC 12V 2A
* 1 x Unpopulated mPCIe Slot (see below how to connect it)
* 1 x Unpopulated Sim Card Slot
Installation:
1. Access to tty console via UART serial
2. Enter failsafe mode and mount rootfs
<https://openwrt.org/docs/guide-user/troubleshooting/failsafe_and_factory_reset>
3. Edit inittab to enable shell on tty console
`sed -i 's/#ttyM/ttyM/' /etc/inittab`
4. Reboot and upload `-nand-factory.bin` to the router (using wget)
5. Use `sysupgrade` command to install
Another installation method is to hijack the upgrade server domain
of stock firmware, because it's using insecure http.
This commit is based on @LGA1150(at GitHub)'s work
<https://github.com/LGA1150/openwrt/commit/a4932c8d5a275d1fb4297bd20ec03f9270a45d1c>
With some changes:
1. Added `qpic_bam` node in dts. I don't know much about this,
but I observed other dtses have this node.
2. Removed `ldo` node under `sd_0_pinmux`, because `ldo` cause SD card not
working. This fix is from
<https://github.com/coolsnowwolf/lede/commit/51143b4c7571f717afe071db60bbb4db1532cbf2>
3. Removed the 32MB NOR variant.
4. Removed `cd-gpios` in `sdhci` node, because it's reported that it makes
wlan2g led light up.
5. Added ethphy led config in dts.
6. Changed nand partition label from `rootfs` to `ubi`.
About the 128MiB variant: The stock bootloader sets size of nand to 64MiB.
But most of this devices have 128MiB nand. If you want to use all 128MiB,
you need to modify the `MIBIB` data of bootloader. More details can be
found on github:
<https://github.com/openwrt/openwrt/pull/3691#issuecomment-818770060>
For instructions on how to flash the MIBIB partition from u-boot console:
<https://github.com/openwrt/openwrt/pull/3691#issuecomment-819138232>
About the Mini PCIe slot: (from "ygleg")
"The REFCLK signals on the Mini PCIe slot is not connected on
this board out of the box. If you want to use the Mini PCIe slot
on the board, you need to (preferably) solder two 0402 resistors:
R436 (REFCLK+) and R444 (REFCLK-)..."
This and much more information is provoided in the github comment:
<https://github.com/openwrt/openwrt/pull/3691#issuecomment-968054670>
Signed-off-by: Richard Yu <yurichard3839@gmail.com>
Signed-off-by: DENG Qingfang <dqfext@gmail.com>
[Added comment about MIBIB+128 MiB variant. Added commit
message section about pcie slot. Renamed gpio-leds' subnodes
and added color, function+enum properties.]
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Diffstat (limited to 'target/linux/ipq40xx/files/arch')
3 files changed, 378 insertions, 0 deletions
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac-128m.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac-128m.dts new file mode 100644 index 0000000000..0896374ab2 --- /dev/null +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac-128m.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019-r619ac.dtsi" + +/ { + model = "P&W R619AC 128M"; + compatible = "p2w,r619ac-128m"; +}; + +&nand_rootfs { + /* + * Watch out: stock MIBIB is set up for a 64MiB chip. + * If a 128MiB flash chip is used, make sure to have + * the right values in MIBIB or the device might not + * boot. + */ + reg = <0x0 0x8000000>; +}; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac-64m.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac-64m.dts new file mode 100644 index 0000000000..6c8821a90e --- /dev/null +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac-64m.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019-r619ac.dtsi" + +/ { + model = "P&W R619AC 64M"; + compatible = "p2w,r619ac-64m"; +}; + +&nand_rootfs { + reg = <0x0 0x4000000>; +}; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi new file mode 100644 index 0000000000..ff0486cf09 --- /dev/null +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi @@ -0,0 +1,348 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/soc/qcom,tcsr.h> + +/ { + chosen { + bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1"; + }; + + aliases { + led-boot = &led_sys; + led-failsafe = &led_sys; + led-running = &led_sys; + led-upgrade = &led_sys; + label-mac-device = &gmac0; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + }; + + ess-psgmii@98000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = <TCSR_ESS_PSGMII>; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>; + }; + + usb2@60f8800 { + status = "okay"; + }; + + usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + + ess-switch@c000000 { + status = "okay"; + }; + + edma@c080000 { + status = "okay"; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_sys: led-0 { + label = "blue:sys"; + gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>; + color = <LED_COLOR_ID_BLUE>; + function = LED_FUNCTION_POWER; + }; + + led-1 { + label = "blue:wlan2g"; + gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + color = <LED_COLOR_ID_BLUE>; + function = LED_FUNCTION_WLAN; + function-enumerator = <0>; + }; + + led-2 { + label = "blue:wlan5g"; + gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1tpt"; + color = <LED_COLOR_ID_BLUE>; + function = LED_FUNCTION_WLAN; + function-enumerator = <1>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&blsp1_spi1 { + status = "okay"; + + flash@0 { + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "MIBIB"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "QSEE"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "CDT"; + reg = <0xc0000 0x10000>; + read-only; + }; + + partition@d0000 { + label = "DDRPARAMS"; + reg = <0xd0000 0x10000>; + read-only; + }; + + partition@e0000 { + label = "APPSBLENV"; + reg = <0xe0000 0x10000>; + read-only; + }; + + partition@f0000 { + label = "APPSBL"; + reg = <0xf0000 0x80000>; + read-only; + }; + + partition@170000 { + label = "ART"; + reg = <0x170000 0x10000>; + read-only; + }; + }; + }; +}; + +&nand { + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + nand_rootfs: partition@0 { + label = "ubi"; + /* reg defined in 64M/128M variant dts. */ + }; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&pcie0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + perst-gpio = <&tlmm 4 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 40 GPIO_ACTIVE_HIGH>; + + /* Free slot for use */ + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; +}; + +&qpic_bam { + status = "okay"; +}; + +&sdhci { + pinctrl-0 = <&sd_0_pins>; + pinctrl-names = "default"; + vqmmc-supply = <&vqmmc>; + status = "okay"; +}; + +&tlmm { + pcie_pins: pcie_pinmux { + mux { + pins = "gpio2"; + function = "gpio"; + output-low; + bias-pull-down; + }; + }; + + mdio_pins: mdio_pinmux { + mux_1 { + pins = "gpio6"; + function = "mdio"; + bias-pull-up; + }; + + mux_2 { + pins = "gpio7"; + function = "mdc"; + bias-pull-up; + }; + }; + + sd_0_pins: sd_0_pinmux { + mux_1 { + pins = "gpio23", "gpio24", "gpio25", "gpio26", "gpio28"; + function = "sdio"; + drive-strength = <10>; + }; + + mux_2 { + pins = "gpio27"; + function = "sdio"; + drive-strength = <16>; + }; + }; + + serial_0_pins: serial0-pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; +}; + +ðphy0 { + qcom,single-led-1000; + qcom,single-led-100; + qcom,single-led-10; +}; + +ðphy1 { + qcom,single-led-1000; + qcom,single-led-100; + qcom,single-led-10; +}; + +ðphy2 { + qcom,single-led-1000; + qcom,single-led-100; + qcom,single-led-10; +}; + +ðphy3 { + qcom,single-led-1000; + qcom,single-led-100; + qcom,single-led-10; +}; + +ðphy4 { + qcom,single-led-1000; + qcom,single-led-100; + qcom,single-led-10; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; + +&vqmmc { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "P&W R619AC"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "P&W R619AC"; +}; |