kernel: add pending mtk_sgmii and phy improvements from @lynxis

Add pending patches from Alexander 'lynxis' Couzens which are required
for RealTek NBase-T PHYs or SFP+ cages to work when connected to the
SGMII interface provided by recent MediaTek SoCs [1].
The patches for MT753x fix link speed limitation on CPU ports observed
by many users which is due to reset being carried out wrongly [2].

[1]: https://patchwork.kernel.org/project/netdevbpf/list/?series=669488&state=*
[2]: https://patchwork.kernel.org/project/netdevbpf/list/?series=669486&state=*

Signed-off-by: Daniel Golle <daniel@makrotopia.org>

1 files changed, 44 insertions, 0 deletions

diff --git a/target/linux/generic/pending-5.15/724-net-mtk_sgmii-implement-mtk_pcs_ops.patch b/target/linux/generic/pending-5.15/724-net-mtk_sgmii-implement-mtk_pcs_ops.patch
new file mode 100644
index 0000000000..896f0169d2
--- /dev/null
+++ b/target/linux/generic/pending-5.15/724-net-mtk_sgmii-implement-mtk_pcs_ops.patch
@@ -0,0 +1,44 @@
+From cbfed00575d15eafd85efd9619b7ecc0836a4aa7 Mon Sep 17 00:00:00 2001
+From: Alexander Couzens <lynxis@fe80.eu>
+Date: Sat, 13 Aug 2022 14:42:12 +0200
+Subject: [PATCH 04/10] net: mtk_sgmii: implement mtk_pcs_ops
+
+Implement mtk_pcs_ops for the SGMII pcs to read the current state
+of the hardware.
+
+Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
+[added DUPLEX_FULL]
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+---
+ drivers/net/ethernet/mediatek/mtk_sgmii.c | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
++++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
+@@ -122,10 +122,26 @@ static void mtk_pcs_link_up(struct phyli
+ 	regmap_write(mpcs->regmap, SGMSYS_SGMII_MODE, val);
+ }
+ 
++static void mtk_pcs_get_state(struct phylink_pcs *pcs, struct phylink_link_state *state)
++{
++	struct mtk_pcs *mpcs = pcs_to_mtk_pcs(pcs);
++	unsigned int val;
++
++	regmap_read(mpcs->regmap, mpcs->ana_rgc3, &val);
++	state->speed = val & RG_PHY_SPEED_3_125G ? SPEED_2500 : SPEED_1000;
++
++	regmap_read(mpcs->regmap, SGMSYS_PCS_CONTROL_1, &val);
++	state->an_complete = !!(val & SGMII_AN_COMPLETE);
++	state->link = !!(val & SGMII_LINK_STATYS);
++	state->duplex = DUPLEX_FULL;
++	state->pause = 0;
++}
++
+ static const struct phylink_pcs_ops mtk_pcs_ops = {
+ 	.pcs_config = mtk_pcs_config,
+ 	.pcs_an_restart = mtk_pcs_restart_an,
+ 	.pcs_link_up = mtk_pcs_link_up,
++	.pcs_get_state = mtk_pcs_get_state,
+ };
+ 
+ int mtk_sgmii_init(struct mtk_sgmii *ss, struct device_node *r, u32 ana_rgc3)