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authorFelix Fietkau <nbd@nbd.name>2020-10-24 21:14:16 +0200
committerFelix Fietkau <nbd@nbd.name>2021-02-16 20:06:51 +0100
commitb10d6044599d8c1fa7fbb2374bcbf30118d39db1 (patch)
tree3fc84f92c14dfa7178487b71e1b8d63c2b688439 /target/linux/generic/pending-5.10/761-net-dsa-mt7530-Support-EEE-features.patch
parent299b8554183791b325e393c880d32360d7d72f73 (diff)
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kernel: add linux 5.10 support
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'target/linux/generic/pending-5.10/761-net-dsa-mt7530-Support-EEE-features.patch')
-rw-r--r--target/linux/generic/pending-5.10/761-net-dsa-mt7530-Support-EEE-features.patch121
1 files changed, 121 insertions, 0 deletions
diff --git a/target/linux/generic/pending-5.10/761-net-dsa-mt7530-Support-EEE-features.patch b/target/linux/generic/pending-5.10/761-net-dsa-mt7530-Support-EEE-features.patch
new file mode 100644
index 0000000000..3e4413db02
--- /dev/null
+++ b/target/linux/generic/pending-5.10/761-net-dsa-mt7530-Support-EEE-features.patch
@@ -0,0 +1,121 @@
+From 9cfb2d426c38272f245e9e6f62b3552d1ed5852b Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
+Date: Tue, 21 Apr 2020 00:18:08 +0200
+Subject: [PATCH] net: dsa: mt7530: Support EEE features
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: René van Dorst <opensource@vdorst.com>
+--- a/drivers/net/dsa/mt7530.c
++++ b/drivers/net/dsa/mt7530.c
+@@ -2266,9 +2266,13 @@ static void mt753x_phylink_mac_link_up(s
+ switch (speed) {
+ case SPEED_1000:
+ mcr |= PMCR_FORCE_SPEED_1000;
++ if (priv->eee_enable & BIT(port))
++ mcr |= PMCR_FORCE_EEE1G;
+ break;
+ case SPEED_100:
+ mcr |= PMCR_FORCE_SPEED_100;
++ if (priv->eee_enable & BIT(port))
++ mcr |= PMCR_FORCE_EEE100;
+ break;
+ }
+ if (duplex == DUPLEX_FULL) {
+@@ -2509,6 +2513,54 @@ mt753x_phy_write(struct dsa_switch *ds,
+ return priv->info->phy_write(ds, port, regnum, val);
+ }
+
++static int mt7530_get_mac_eee(struct dsa_switch *ds, int port,
++ struct ethtool_eee *e)
++{
++ struct mt7530_priv *priv = ds->priv;
++ u32 eeecr, pmsr;
++
++ e->eee_enabled = !!(priv->eee_enable & BIT(port));
++
++ if (e->eee_enabled) {
++ eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
++ e->tx_lpi_enabled = !(eeecr & LPI_MODE_EN);
++ e->tx_lpi_timer = (eeecr >> 4) & 0xFFF;
++ pmsr = mt7530_read(priv, MT7530_PMSR_P(port));
++ e->eee_active = e->eee_enabled && !!(pmsr & PMSR_EEE1G);
++ } else {
++ e->tx_lpi_enabled = 0;
++ e->tx_lpi_timer = 0;
++ e->eee_active = 0;
++ }
++
++ return 0;
++}
++
++static int mt7530_set_mac_eee(struct dsa_switch *ds, int port,
++ struct ethtool_eee *e)
++{
++ struct mt7530_priv *priv = ds->priv;
++ u32 eeecr;
++
++ if (e->tx_lpi_enabled && e->tx_lpi_timer > 0xFFF)
++ return -EINVAL;
++
++ if (e->eee_enabled) {
++ priv->eee_enable |= BIT(port);
++ //MT7530_PMEEECR_P
++ eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
++ eeecr &= 0xFFFF0000;
++ if (!e->tx_lpi_enabled)
++ eeecr |= LPI_MODE_EN;
++ eeecr = LPI_THRESH(e->tx_lpi_timer);
++ mt7530_write(priv, MT7530_PMEEECR_P(port), eeecr);
++ } else {
++ priv->eee_enable &= ~(BIT(port));
++ }
++
++ return 0;
++}
++
+ static const struct dsa_switch_ops mt7530_switch_ops = {
+ .get_tag_protocol = mtk_get_tag_protocol,
+ .setup = mt753x_setup,
+@@ -2537,6 +2589,8 @@ static const struct dsa_switch_ops mt753
+ .phylink_mac_an_restart = mt753x_phylink_mac_an_restart,
+ .phylink_mac_link_down = mt753x_phylink_mac_link_down,
+ .phylink_mac_link_up = mt753x_phylink_mac_link_up,
++ .get_mac_eee = mt7530_get_mac_eee,
++ .set_mac_eee = mt7530_set_mac_eee,
+ };
+
+ static const struct mt753x_info mt753x_table[] = {
+--- a/drivers/net/dsa/mt7530.h
++++ b/drivers/net/dsa/mt7530.h
+@@ -240,6 +240,8 @@ enum mt7530_vlan_port_attr {
+ #define PMCR_RX_EN BIT(13)
+ #define PMCR_BACKOFF_EN BIT(9)
+ #define PMCR_BACKPR_EN BIT(8)
++#define PMCR_FORCE_EEE1G BIT(7)
++#define PMCR_FORCE_EEE100 BIT(6)
+ #define PMCR_TX_FC_EN BIT(5)
+ #define PMCR_RX_FC_EN BIT(4)
+ #define PMCR_FORCE_SPEED_1000 BIT(3)
+@@ -289,6 +291,12 @@ enum mt7530_vlan_port_attr {
+ #define MT7531_DBG_CNT(x) (0x3018 + (x) * 0x100)
+ #define MT7531_DIS_CLR BIT(31)
+
++#define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100)
++#define WAKEUP_TIME_1000(x) ((x & 0xFF) << 24)
++#define WAKEUP_TIME_100(x) ((x & 0xFF) << 16)
++#define LPI_THRESH(x) ((x & 0xFFF) << 4)
++#define LPI_MODE_EN BIT(0)
++
+ /* Register for MIB */
+ #define MT7530_PORT_MIB_COUNTER(x) (0x4000 + (x) * 0x100)
+ #define MT7530_MIB_CCR 0x4fe0
+@@ -732,6 +740,7 @@ struct mt7530_priv {
+ unsigned int p5_intf_sel;
+ u8 mirror_rx;
+ u8 mirror_tx;
++ u8 eee_enable;
+
+ struct mt7530_port ports[MT7530_NUM_PORTS];
+ /* protect among processes for registers access*/