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authorRafał Miłecki <zajec5@gmail.com>2015-04-07 22:06:17 +0000
committerRafał Miłecki <zajec5@gmail.com>2015-04-07 22:06:17 +0000
commita9d2a1aa295b4aabf2ef8692fa525f8b4c28678b (patch)
treee512db242a2849317b8cca4688ed082019737aae /target/linux/generic/patches-4.0
parent8100b227a99bcdfac356cdd24166343851f362bc (diff)
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kernel: backport ssb patches up to changes queued for 4.1
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 45306
Diffstat (limited to 'target/linux/generic/patches-4.0')
-rw-r--r--target/linux/generic/patches-4.0/020-ssb_update.patch29
1 files changed, 29 insertions, 0 deletions
diff --git a/target/linux/generic/patches-4.0/020-ssb_update.patch b/target/linux/generic/patches-4.0/020-ssb_update.patch
new file mode 100644
index 0000000000..946cb3b106
--- /dev/null
+++ b/target/linux/generic/patches-4.0/020-ssb_update.patch
@@ -0,0 +1,29 @@
+--- a/drivers/ssb/driver_pcicore.c
++++ b/drivers/ssb/driver_pcicore.c
+@@ -357,6 +357,15 @@ static void ssb_pcicore_init_hostmode(st
+ pcicore_write32(pc, SSB_PCICORE_SBTOPCI2,
+ SSB_PCICORE_SBTOPCI_MEM | SSB_PCI_DMA);
+
++ /*
++ * Accessing PCI config without a proper delay after devices reset (not
++ * GPIO reset) was causing reboots on WRT300N v1.0.
++ * Tested delay 850 us lowered reboot chance to 50-80%, 1000 us fixed it
++ * completely. Flushing all writes was also tested but with no luck.
++ */
++ if (pc->dev->bus->chip_id == 0x4704)
++ usleep_range(1000, 2000);
++
+ /* Enable PCI bridge BAR0 prefetch and burst */
+ val = PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ ssb_extpci_write_config(pc, 0, 0, 0, PCI_COMMAND, &val, 2);
+--- a/drivers/ssb/main.c
++++ b/drivers/ssb/main.c
+@@ -1135,6 +1135,8 @@ static u32 ssb_tmslow_reject_bitmask(str
+ case SSB_IDLOW_SSBREV_25: /* TODO - find the proper REJECT bit */
+ case SSB_IDLOW_SSBREV_27: /* same here */
+ return SSB_TMSLOW_REJECT; /* this is a guess */
++ case SSB_IDLOW_SSBREV:
++ break;
+ default:
+ WARN(1, KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
+ }