diff options
author | Hauke Mehrtens <hauke@openwrt.org> | 2014-07-22 21:40:41 +0000 |
---|---|---|
committer | Hauke Mehrtens <hauke@openwrt.org> | 2014-07-22 21:40:41 +0000 |
commit | a3df2250cbd23608c175fb402d73d2c19667e89f (patch) | |
tree | 969e0b684de55fc8f2701a45d2ca6fc2bfcee961 /target/linux/generic/patches-3.10/020-ssb_update.patch | |
parent | 1413678b0717fa8b5b598f0c55a8f42b9f983094 (diff) | |
download | upstream-a3df2250cbd23608c175fb402d73d2c19667e89f.tar.gz upstream-a3df2250cbd23608c175fb402d73d2c19667e89f.tar.bz2 upstream-a3df2250cbd23608c175fb402d73d2c19667e89f.zip |
kernel: update bcma and ssb to version master-2014-07-22
This is a backport of bcma and ssb from wireless-tesing/master tag
master-2014-07-22.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@41804 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/generic/patches-3.10/020-ssb_update.patch')
-rw-r--r-- | target/linux/generic/patches-3.10/020-ssb_update.patch | 199 |
1 files changed, 199 insertions, 0 deletions
diff --git a/target/linux/generic/patches-3.10/020-ssb_update.patch b/target/linux/generic/patches-3.10/020-ssb_update.patch index 07ac79f92d..48788a69c6 100644 --- a/target/linux/generic/patches-3.10/020-ssb_update.patch +++ b/target/linux/generic/patches-3.10/020-ssb_update.patch @@ -559,6 +559,161 @@ err = ssb_fetch_invariants(bus, get_invariants); if (err) { ssb_bus_may_powerdown(bus); +--- a/drivers/ssb/pci.c ++++ b/drivers/ssb/pci.c +@@ -326,13 +326,13 @@ err_ctlreg: + return err; + } + +-static s8 r123_extract_antgain(u8 sprom_revision, const u16 *in, +- u16 mask, u16 shift) ++static s8 sprom_extract_antgain(u8 sprom_revision, const u16 *in, u16 offset, ++ u16 mask, u16 shift) + { + u16 v; + u8 gain; + +- v = in[SPOFF(SSB_SPROM1_AGAIN)]; ++ v = in[SPOFF(offset)]; + gain = (v & mask) >> shift; + if (gain == 0xFF) + gain = 2; /* If unset use 2dBm */ +@@ -416,12 +416,14 @@ static void sprom_extract_r123(struct ss + SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0); + + /* Extract the antenna gain values. */ +- out->antenna_gain.a0 = r123_extract_antgain(out->revision, in, +- SSB_SPROM1_AGAIN_BG, +- SSB_SPROM1_AGAIN_BG_SHIFT); +- out->antenna_gain.a1 = r123_extract_antgain(out->revision, in, +- SSB_SPROM1_AGAIN_A, +- SSB_SPROM1_AGAIN_A_SHIFT); ++ out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in, ++ SSB_SPROM1_AGAIN, ++ SSB_SPROM1_AGAIN_BG, ++ SSB_SPROM1_AGAIN_BG_SHIFT); ++ out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in, ++ SSB_SPROM1_AGAIN, ++ SSB_SPROM1_AGAIN_A, ++ SSB_SPROM1_AGAIN_A_SHIFT); + if (out->revision >= 2) + sprom_extract_r23(out, in); + } +@@ -468,7 +470,15 @@ static void sprom_extract_r458(struct ss + + static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in) + { ++ static const u16 pwr_info_offset[] = { ++ SSB_SPROM4_PWR_INFO_CORE0, SSB_SPROM4_PWR_INFO_CORE1, ++ SSB_SPROM4_PWR_INFO_CORE2, SSB_SPROM4_PWR_INFO_CORE3 ++ }; + u16 il0mac_offset; ++ int i; ++ ++ BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) != ++ ARRAY_SIZE(out->core_pwr_info)); + + if (out->revision == 4) + il0mac_offset = SSB_SPROM4_IL0MAC; +@@ -524,14 +534,59 @@ static void sprom_extract_r45(struct ssb + } + + /* Extract the antenna gain values. */ +- SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01, +- SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT); +- SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01, +- SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT); +- SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23, +- SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT); +- SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23, +- SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT); ++ out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in, ++ SSB_SPROM4_AGAIN01, ++ SSB_SPROM4_AGAIN0, ++ SSB_SPROM4_AGAIN0_SHIFT); ++ out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in, ++ SSB_SPROM4_AGAIN01, ++ SSB_SPROM4_AGAIN1, ++ SSB_SPROM4_AGAIN1_SHIFT); ++ out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in, ++ SSB_SPROM4_AGAIN23, ++ SSB_SPROM4_AGAIN2, ++ SSB_SPROM4_AGAIN2_SHIFT); ++ out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in, ++ SSB_SPROM4_AGAIN23, ++ SSB_SPROM4_AGAIN3, ++ SSB_SPROM4_AGAIN3_SHIFT); ++ ++ /* Extract cores power info info */ ++ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) { ++ u16 o = pwr_info_offset[i]; ++ ++ SPEX(core_pwr_info[i].itssi_2g, o + SSB_SPROM4_2G_MAXP_ITSSI, ++ SSB_SPROM4_2G_ITSSI, SSB_SPROM4_2G_ITSSI_SHIFT); ++ SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SPROM4_2G_MAXP_ITSSI, ++ SSB_SPROM4_2G_MAXP, 0); ++ ++ SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SPROM4_2G_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SPROM4_2G_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SPROM4_2G_PA_2, ~0, 0); ++ SPEX(core_pwr_info[i].pa_2g[3], o + SSB_SPROM4_2G_PA_3, ~0, 0); ++ ++ SPEX(core_pwr_info[i].itssi_5g, o + SSB_SPROM4_5G_MAXP_ITSSI, ++ SSB_SPROM4_5G_ITSSI, SSB_SPROM4_5G_ITSSI_SHIFT); ++ SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SPROM4_5G_MAXP_ITSSI, ++ SSB_SPROM4_5G_MAXP, 0); ++ SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM4_5GHL_MAXP, ++ SSB_SPROM4_5GH_MAXP, 0); ++ SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM4_5GHL_MAXP, ++ SSB_SPROM4_5GL_MAXP, SSB_SPROM4_5GL_MAXP_SHIFT); ++ ++ SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SPROM4_5GL_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SPROM4_5GL_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SPROM4_5GL_PA_2, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gl[3], o + SSB_SPROM4_5GL_PA_3, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SPROM4_5G_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SPROM4_5G_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SPROM4_5G_PA_2, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5g[3], o + SSB_SPROM4_5G_PA_3, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SPROM4_5GH_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SPROM4_5GH_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SPROM4_5GH_PA_2, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gh[3], o + SSB_SPROM4_5GH_PA_3, ~0, 0); ++ } + + sprom_extract_r458(out, in); + +@@ -621,14 +676,22 @@ static void sprom_extract_r8(struct ssb_ + SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0); + + /* Extract the antenna gain values. */ +- SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01, +- SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT); +- SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01, +- SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT); +- SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23, +- SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT); +- SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23, +- SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT); ++ out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in, ++ SSB_SPROM8_AGAIN01, ++ SSB_SPROM8_AGAIN0, ++ SSB_SPROM8_AGAIN0_SHIFT); ++ out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in, ++ SSB_SPROM8_AGAIN01, ++ SSB_SPROM8_AGAIN1, ++ SSB_SPROM8_AGAIN1_SHIFT); ++ out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in, ++ SSB_SPROM8_AGAIN23, ++ SSB_SPROM8_AGAIN2, ++ SSB_SPROM8_AGAIN2_SHIFT); ++ out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in, ++ SSB_SPROM8_AGAIN23, ++ SSB_SPROM8_AGAIN3, ++ SSB_SPROM8_AGAIN3_SHIFT); + + /* Extract cores power info info */ + for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) { --- a/drivers/ssb/pcihost_wrapper.c +++ b/drivers/ssb/pcihost_wrapper.c @@ -38,7 +38,7 @@ static int ssb_pcihost_resume(struct pci @@ -683,6 +838,50 @@ #define SSB_SPROM_BASE1 0x1000 #define SSB_SPROM_BASE31 0x0800 #define SSB_SPROM_REVISION 0x007E +@@ -344,6 +345,43 @@ + #define SSB_SPROM4_TXPID5GH2_SHIFT 0 + #define SSB_SPROM4_TXPID5GH3 0xFF00 + #define SSB_SPROM4_TXPID5GH3_SHIFT 8 ++ ++/* There are 4 blocks with power info sharing the same layout */ ++#define SSB_SPROM4_PWR_INFO_CORE0 0x0080 ++#define SSB_SPROM4_PWR_INFO_CORE1 0x00AE ++#define SSB_SPROM4_PWR_INFO_CORE2 0x00DC ++#define SSB_SPROM4_PWR_INFO_CORE3 0x010A ++ ++#define SSB_SPROM4_2G_MAXP_ITSSI 0x00 /* 2 GHz ITSSI and 2 GHz Max Power */ ++#define SSB_SPROM4_2G_MAXP 0x00FF ++#define SSB_SPROM4_2G_ITSSI 0xFF00 ++#define SSB_SPROM4_2G_ITSSI_SHIFT 8 ++#define SSB_SPROM4_2G_PA_0 0x02 /* 2 GHz power amp */ ++#define SSB_SPROM4_2G_PA_1 0x04 ++#define SSB_SPROM4_2G_PA_2 0x06 ++#define SSB_SPROM4_2G_PA_3 0x08 ++#define SSB_SPROM4_5G_MAXP_ITSSI 0x0A /* 5 GHz ITSSI and 5.3 GHz Max Power */ ++#define SSB_SPROM4_5G_MAXP 0x00FF ++#define SSB_SPROM4_5G_ITSSI 0xFF00 ++#define SSB_SPROM4_5G_ITSSI_SHIFT 8 ++#define SSB_SPROM4_5GHL_MAXP 0x0C /* 5.2 GHz and 5.8 GHz Max Power */ ++#define SSB_SPROM4_5GH_MAXP 0x00FF ++#define SSB_SPROM4_5GL_MAXP 0xFF00 ++#define SSB_SPROM4_5GL_MAXP_SHIFT 8 ++#define SSB_SPROM4_5G_PA_0 0x0E /* 5.3 GHz power amp */ ++#define SSB_SPROM4_5G_PA_1 0x10 ++#define SSB_SPROM4_5G_PA_2 0x12 ++#define SSB_SPROM4_5G_PA_3 0x14 ++#define SSB_SPROM4_5GL_PA_0 0x16 /* 5.2 GHz power amp */ ++#define SSB_SPROM4_5GL_PA_1 0x18 ++#define SSB_SPROM4_5GL_PA_2 0x1A ++#define SSB_SPROM4_5GL_PA_3 0x1C ++#define SSB_SPROM4_5GH_PA_0 0x1E /* 5.8 GHz power amp */ ++#define SSB_SPROM4_5GH_PA_1 0x20 ++#define SSB_SPROM4_5GH_PA_2 0x22 ++#define SSB_SPROM4_5GH_PA_3 0x24 ++ ++/* TODO: Make it deprecated */ + #define SSB_SPROM4_MAXP_BG 0x0080 /* Max Power BG in path 1 */ + #define SSB_SPROM4_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */ + #define SSB_SPROM4_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */ --- a/arch/mips/bcm47xx/sprom.c +++ b/arch/mips/bcm47xx/sprom.c @@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char |