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authorImre Kaloz <kaloz@openwrt.org>2013-01-10 13:23:33 +0000
committerImre Kaloz <kaloz@openwrt.org>2013-01-10 13:23:33 +0000
commitb63b970866a33252759d120121919aa35237a313 (patch)
tree240649df0d282b31090fad58004e3c8ff9b574a0 /target/linux/cns3xxx
parent64910f449024c18e624a498d1daa3deadeced99c (diff)
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clean up PCI bus topology
This makes the PCI bus topology more standard for devices behind a bridge Signed-off-by: Tim Harvey <tharvey@gateworks.com> SVN-Revision: 35078
Diffstat (limited to 'target/linux/cns3xxx')
-rw-r--r--target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/gpio.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/gpio.c b/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/gpio.c
index 8fccbbf452..4f5d50054f 100644
--- a/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/gpio.c
+++ b/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/gpio.c
@@ -59,9 +59,9 @@ __set_direction(struct cns3xxx_gpio_chip *cchip, unsigned pin, int input)
reg = __raw_readl(cchip->base + GPIO_DIR);
if (input)
- reg |= 1 << pin;
+ reg &= ~(1 << pin);
else
- reg &= !(1 << pin);
+ reg |= (1 << pin);
__raw_writel(reg, cchip->base + GPIO_DIR);
}